Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop - Fairchild Semiconductor
Description
DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
August 1986 Revised April 2000
DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
General Description
This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.
The J and K data is processed by the flip-flops on the falling edge of the clock pulse.
The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse.
Data on the J and K inputs can be changed while the clock is HIGH or LOW without affecting the outputs as long as setup and hold times are not violated.
A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.
Ordering Code:
Order Number DM74S112 Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300 Wide
Connection Diagram
Function Table
Inputs PR L H L H H H H H CLR H L L H H H H H CLK X X X ↓ ↓ ↓ ↓ H J X X X L H L H X K X X X L L H H X Q0 H L H* Q0 H L Toggle Q0 Outputs Q Q L H H* Q0 L H
H = HIGH Logic Level X = Either LOW or HIGH Logic Level L = LOW Logic Level ↓ = Negative going edge of pulse.
Q0 = The output logic level of Q before the indicated input conditions were established.
* = This configuration is nonstable; that is, it will not persist when either the preset and/or clear inputs return to its inactive (HIGH) level.
Toggle = Each output changes to the complement of its previous level on each falling edge of the clock pulse.
© 2000 Fairchild Semiconductor Corporation
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DM74S112
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 5.
5V 0°C to +70°C −65°C to +150°C
Note 1: The “Absolute Maximum Ratings” are those values beyo...
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