Quad 2-input NOR gate - NXP Semiconductors
Description
74HC02; 74HCT02
Quad 2-input NOR gate
Rev.
5 — 26 November 2015
Product data sheet
1.
General description
The 74HC02; 74HCT02 is a quad 2-input NOR gate.
Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2.
Features and benefits
Input levels: For 74HC02: CMOS level For 74HCT02: TTL level
Complies with JEDEC standard no.
7A ESD protection:
HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C
3.
Ordering information
Table 1.
Ordering information
Type number Package
Temperature range
74HC02D
40 C to +125 C
74HCT02D
74HC02DB 40 C to +125 C
74HCT02DB
74HC02PW 40 C to +125 C
74HCT02PW
74HC02BQ 40 C to +125 C
74HCT02BQ
Name SO14 SSOP14 TSSOP14 DHVQFN14
Description
plastic small outline package; 14 leads; body width 3.
9 mm
Version SOT108-1
plastic shrink small outline package; 14 leads; body SOT337-1 width 5.
3 mm
plastic thin shrink small outline package; 14 leads; body width 4.
4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package; no leads; 14 terminals; body 2.
5 3 0.
85 mm
NXP Semiconductors
4.
Functional diagram
74HC02; 74HCT02
Quad 2-input NOR gate
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PQD
Fig 1.
Logic symbol
DDK
Fig 2.
IEC logic symbol
5.
Pinning information
5.
1 Pinning
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% PQD
Fig 3.
Logic diagram (one gate)
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DDF
Fig 4.
Pin configuration SO14 and (T)SSOP14
WHUPLQDO LQGH[DUHD
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*1'
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DDF
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin.
The substrate is attached to this pad using conductive die attach material...
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