Silicon N Channel Power MOS FET Power Switching
Description
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RJK0354DSP
Silicon N Channel Power MOS FET Power Switching
REJ03G1661-0101 Rev.
1.
01 Apr 24, 2008
Features
Capable of 4.
5 V gate drive Low drive current High density mounting Low on-resistance RDS(on) = 5.
4 mΩ typ.
(at VGS = 10 V) • Pb-free • • • •
Outline
RENESAS Package code: PRSP0008DD-D (Package name: SOP-8)
5 76 34 4 G 5 6 7 8 D D D D
8
12
1, 2, 3 Source 4 Gate 5, 6, 7, 8 Drain
S S S 1 2 3
Absolute Maximum Ratings
(Ta = 25°C)
Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel to ambient thermal impedance Channel temperature Storage temperature Symbol VDSS VGSS ID ID(pulse)
Note1
Ratings 30 ±20 16 128 16 15 22.
5 2.
0 62.
5 150 –55 to +150
Unit V V A A A A mJ W °C/W °C °C
IDR IAP Note 2 EAR Note 2 Pch Note3 θch-a Note3 Tch Tstg
Notes: 1.
PW ≤ 10 µs, duty cycle ≤ 1% 2.
Value at Tch = 25°C, Rg ≥ 50 Ω 3.
When using the glass epoxy board (FR4 40 x 40 x 1.
6 mm), PW ≤ 10s
REJ03G1661-0101 Rev.
1.
01 Apr 24, 2008 Page 1 of 3
RJK0354DSP
Electrical Characteristics
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(Ta = 25°C)
Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 — — 1.
2 — — — — — — — — — — — — — — — — Typ — — — — 5.
4 7.
5 40 1740 335 110 4.
4 12 4.
3 2.
5 7.
4 3.
6 56.
4 5.
5 0.
81 20 Max — ± 0.
1 1 2.
5 7.
0 10.
5 — — — — — — — — — — — — 1.
06 — Unit V µA µA V mΩ mΩ S pF pF pF Ω nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 8 A, VGS = 10 V Note4 ID = 8 A, VGS = 4.
5 V Note4 ID = 8 A, VDS = 10 V Note4 VDS = 10 V VGS = 0 f = 1 MHz VDD = 10 V VGS = 4.
5 V ID = 8 A VGS = 10 V, ID = 8 A VDD ≅ 10 V RL = 1.
25 Ω Rg = 4.
7 Ω IF = 16 A, VGS = 0 Note4 IF = 16 A, VGS = 0 diF/ dt = 100 A/ µs
Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Ga...
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