HI-FREQUENCY PACKAGED PHEMT
Description
PRELIMINARY
• PERFORMANCE ♦ 20 dBm Output Power (P1dB) ♦ 21 dB Power Gain (G1dB) at 1.
85 GHz ♦ 0.
7 dB Noise Figure at 1.
85 GHz ♦ 30 dBm Output IP3 ♦ 50% Power-Added Efficiency at 1.
85 GHz ♦ Useable Gain to 24 GHz ♦ Evaluation Boards Available
FPD7612P70
HI-FREQUENCY PACKAGED PHEMT
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GATE LEAD IS ANGLED
•
DESCRIPTION AND APPLICATIONS The FPD7612P70 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT).
It utilizes a 0.
25 µm x 200 µm Schottky barrier Gate, defined by high-resolution stepper-based photolithography.
.
The FPD7612 is also available in die form .
Typical applications include gain blocks and medium power stages for applications to 26 GHz.
•
ELECTRICAL SPECIFICATIONS AT 22°C
Parameter Power at 1dB Gain Compression Gain at 1dB Gain Compression Power-Added Efficiency Maximum Stable Gain (S21/S12) f = 12 GHz f = 18 GHz Noise Figure Output Third-Order Intercept Point POUT = 9 dBm SCL Saturated Drain-Source Current Maximum Drain-Source Current Transconductance Gate-Source Leakage Current Pinch-Off Voltage Gate-Source Breakdown Voltage Gate-Drain Breakdown Voltage Thermal Resistivity (see Notes) IDSS IMAX GM IGSO |VP| |VBDGS| |VBDGD| θJC VDS = 1.
3 V; VGS = 0 V VDS = 1.
3 V; VGS ≅ +1 V VDS = 1.
3 V; VGS = 0 V VGS = -5 V VDS = 1.
3 V; IDS = 0.
2 mA IGS = 0.
2 mA IGD = 0.
2 mA VDS > 3V 0.
7 12 14.
5 45 60 120 80 1 0.
9 14 16 335 10 1.
3 75 mA mA mS µA V V V °C/W NF IP3 VDS = 5 V; IDS = 25% IDSS VDS = 5V; IDS = 50% IDSS Symbol P1dB SSG PAE MSG Test Conditions VDS = 5 V; IDS = 50% IDSS VDS = 5 V; IDS = 50% IDSS VDS = 5 V; IDS = 50% IDSS; POUT = P1dB VDS = 5 V; IDS = 50% IDSS 14 10 0.
7 30 dB dBm Min Typ 20 21 45 Max Units dBm dB % RF SPECIFICATIONS MEASURED AT f = 1850 MHz USING CW SIGNAL (except as noted)
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http://www.
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Revised: 7/15/05 Email: sales@filcsi.
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PRELIMINARY
• ABSOLUTE MAXIMUM RATINGS1
Parameter Drain-Source Voltage Gate-Source V...
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