TA31142
Description
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UTC TA31142
LINEAR INTEGRATED CIRCUIT
LOW POWER IF RECEIVER IC
DESCRIPTION
The UTC TA31142 is a low power IF receiver IC and is suitable for use as the second IF downconverter in double-conversion paging systems.
It is well-suited for POCSAG paging applications and incorporates a 2-level FSK demodulator consisting of a quadrature FM demodulator, on-chip bit-rate filter, and 1-bit comparator.
An on-chip 1V regulator is provided for convenient biasing of off-chip circuitry.
FEATURES
*Extremely low power operation with power-down feature *Built-in crystal oscillator for mixer local oscillator *Mixer input frequency: 10-50 MHz *Quadrature detector *On-chip bit-rate filter *Audio output *1-bit comparator with open collector output *1V regulator *1.
1V low battery alarm
TSSOP-20
PIN CONFIGURATIONS
OSCIN 1 OSCOUT 2 MIXOUT 3 VCC IFIN DEC FSKREF IFOUT QUAD AFOUT
4 5 6 7 8 9 10
11 LPFIN 12 LPFOUT 13 BS 14 CHARGE 15 FSKOUT 16 ALM 17 REGCON 18 REGOUT 19 VSS 20 MIXIN
UTC
UNISONIC TECHNOLOGIES
CO.
, LTD.
1
QW-R103-015,A
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DataSheet4U.
com
UTC TA31142
NUMBER SYMBOL
1 2 3
LINEAR INTEGRATED CIRCUIT
DESCRIPTION NUMBER SYMBOL
11 12 13
DESCRIPTION
OSCIN Oscillator input (base) OSCOUT Oscillator output (emitter) MIXOUT Mixer output (2KΩ output impedance)
4
VCC
Nominal 1.
4V supply
14
5 6 7 8
IFIN DEC FSKREF IFOUT
IF amplifier input (2KΩ input impedance) IF amplifier de-coupling capacitor connection 1-bit comparator reference input (requires external capacitor) IF amplifier output
15 16 17 18
9 10
QUAD AFOUT
Quadrature FM demodulator input Quadrature FM demodulator output
19 20
LPFIN LPF operational amplifier input LPFOUT LPF operational amplifier output BS Two-state logic input to control receiver power up/down.
(BS=high=normal operation; BS=low=stand-by mode) CHARGE Two-state logic input to control charge-discharge circuit.
(CHARGE=high=fast charge; CHARGE=low=slow charge) FSKOUT Open collector NRZ comparator output (requires pull-up re...
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