NPN SILICON BIAS RESISTOR TRANSISTOR
Description
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MMUN2211LT1/D
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single device and its external resistor bias network.
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor.
The BRT eliminates these individual components by integrating them into a single device.
The use of a BRT can reduce both system cost and board space.
The device is housed in the SOT-23 package which is designed for low power surface mount applications.
• Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • The SOT-23 package can be soldered using wave or reflow.
The modified gull-winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die.
• Available in 8 mm embossed tape and reel.
Use the Device Number to order the 7 inch/3000 unit reel.
Replace “T1” with “T3” in the Device Number to order the13 inch/10,000 unit reel.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Total Power Dissipation @ TA = 25°C(1) Derate above 25°C
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MMUN2211LT1 SERIES
Motorola Preferred Devices
NPN SILICON BIAS RESISTOR TRANSISTOR
PIN 3 COLLECTOR (OUTPUT) R1
1
3
PIN 1 R2 BASE (INPUT) PIN 2 EMITTER (GROUND)
2
CASE 318-08, STYLE 6 SOT-23 (TO-236AB)
Symbol VCBO VCEO IC PD
Value 50 50 100 *200 1.
6
Unit Vdc Vdc mAdc mW mW/°C
THERMAL CHARACTERISTICS
Thermal Resistance — Junction-to-Ambient (surface mounted) Operating and Storage Temperature Range Maximum Temperature for Soldering Purposes, Time in Solder Bath RθJA TJ, Tstg TL 625 – 65 to +150 260 10 °C/W °C °C Sec
DEVICE MARKING AND RESISTOR VALUES
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