(MAX9242 - MAX9246) 21-Bit Deserializers
Description
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19-3954; Rev 0; 1/06
21-Bit Deserializers with Programmable Spread Spectrum and DC Balance
General Description
The MAX9242/MAX9244/MAX9246 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs.
A separate parallel-rate LVDS clock provides the timing for deserialization.
The MAX9242/ MAX9244/MAX9246 feature spread-spectrum capability, allowing the output data and clock frequency to spread over a specified range to reduce EMI.
The single-ended data and clock outputs are programmable for a frequency spread of ±2%, ±4%, or no spread.
The spread-spectrum function is also available when the MAX9242/MAX9244/ MAX9246 operate in non-DC-balanced mode.
The modulation rate of the spread is 32kHz for a 33MHz LVDS clock input and scales linearly with frequency.
The singleended outputs have a separate supply, allowing +1.
8V to +5V output logic levels.
The MAX9242/MAX9244/MAX9246 feature programmable DC balance, allowing isolation between a serializer and deserializer using AC-coupling.
The MAX9242/ MAX9244/MAX9246 operate with the MAX9209/ MAX9213 serializers and are available with a risingedge strobe (MAX9242) or falling-edge strobe (MAX9244/MAX9246).
The LVDS inputs meet ISO 10605 ESD specifications with ±30kV Air-Gap Discharge and ±6kV Contact Discharge ratings.
The MAX9242/MAX9244/MAX9246 are available in a 48-pin TSSOP package and operate over the -40°C to +85°C temperature range.
Features
♦ Programmable ±4%, ±2%, or OFF Spread-Spectrum Output for Reduced EMI ♦ Programmable DC-Balanced or Non-DC-Balanced Modes ♦ DC Balance Allows AC-Coupling for Wider Input Common-Mode Voltage Range ♦ Spread Spectrum Operates in DC-Balanced or Non-DC-Balanced Mode ♦ π / 4 Deskew by Oversampling (MAX9242/MAX9244) ♦ 16MHz-to-34MHz (DC-Balanced) and 20MHz-to40MHz (Non-DC-Balanced) Operation (MAX9242/MAX9244) ♦ 6MHz-to-18MHz (DC-Balanced) and 8MHz-to-20MHz (Non-DC-Balanced) Operation (MAX9246) ♦ Rising-Edge (MAX9242) or Falling-Edge (MAX9244/M...
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