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KM23V4000D

Samsung Semiconductor

(KM23x4000xTY) 4M-Bit CMOS Mask ROM


KM23V4000D
KM23V4000D

PDF File KM23V4000D PDF File


Description
KM23V4000D(E)TY/KM23S4000D(E)TY 4M-Bit (512Kx8) CMOS MASK ROM FEATURES • 524,288 x 8 bit organization • Fast access time 3.
3V Operation : 100ns(Max.
) 3.
0V Operation : 120ns(Max.
) 2.
5V Operation : 250ns(Max.
) • Supply voltage KM23V4000D(E)TY : single +3.
0V/ single +3.
3V KM23S4000D(E)TY : single +2.
5V • Current consumption Operating : 25mA(Max.
) Standby : 30 µA(Max.
) • Fully static operation • All inputs and outputs TTL compatible • Three state outputs • Package -.
KM23V(S)4000D(E)TY : 32-TSOP1-0820 CMOS MASK ROM GENERAL DESCRIPTION The KM23V4000D(E)TY and KM23S4000D(E)TY are fully static mask programmable ROM organized 524,288 x 8 bit.
It is fabricated using silicon gate CMOS process technoiogy.
This device operates with low power supply, and all inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and data memory, character generator.
The KM23V4000D(E)TY and KM23S4000D(E)TY are packaged in a 32-TSOP1.
FUNCTIONAL BLOCK DIAGRAM A18 X BUFFERS AND DECODER MEMORY CELL MATRIX (524,288x8) PRODUCT INFORMATION Product Operating Temp Range 0°C~70°C -20°C~85°C .
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A0 Y BUFFERS AND DECODER SENSE AMP.
BUFFERS CE OE CONTROL LOGIC Pin Name A0 - A18 Q0 - Q7 CE OE VCC VSS N.
C w w w .
D t a .
.
.
S a Q7 e h A11 A9 A8 A13 A14 A17 N.
C VCC A18 A16 #1 KM23V4000DTY KM23S4000DTY t e U 4 .
c m o 2.
5V Vcc Range (Typical) 3.
3V/3.
0V Speed (ns) 100/120 250 100/120 250 KM23V4000DETY KM23S4000DETY 3.
3V/3.
0V 2.
5V PIN CONFIGURATION #32 OE A10 CE Q7 Q6 Q5 Q4 Q0 32-TSOP1 Q3 VSS Q2 Q1 Q0 Pin Function A15 A12 A7 A6 A5 A4 #16 #17 Address Inputs Data Outputs Chip Enable Output Enable Power Ground No Connection KM23V4000D(E)TY KM23S4000D(E)TY w w w .
D at a e h S et 4U A1 A2 A3 A0 .
m o c KM23V4000D(E)TY/KM23S4000D(E)TY ABSOLUTE MAXIMUM RATINGS Item Voltage on Any Pin Relative to VSS Temperature Unde...



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