(MT58Lxxxx) 8Mb SYNCBURST SRAM
Description
.
U 4 t ™ e 8Mb SYNCBURST e h SRAM S a t a D .
FEATURES w w w
m o c
8Mb: 512K x 18, 256K x 32/36 PIPELINED, SCD SYNCBURST SRAM
MT58L512L18P, MT58L256L32P, MT58L256L36P; MT58L512V18P, MT58L256V32P, MT58L256V36P
3.
3V VDD, 3.
3V or 2.
5V I/O, Pipelined, Single-Cycle Deselect
• Fast clock and OE# access times • Single +3.
3V +0.
3V/-0.
165V power supply (VDD) • Separate +3.
3V or +2.
5V isolated output buffer supply (VDDQ) • SNOOZE MODE for reduced-power standby • Single-cycle deselect (Pentium® BSRAM-compatible) • Common data inputs and data outputs • Individual BYTE WRITE control and GLOBAL WRITE • Three chip enables for simple depth expansion and address pipelining • Clock-controlled and registered addresses, data I/Os and control signals • Internally self-timed WRITE cycle • Burst control (interleaved or linear burst) • Automatic power-down for portable applications • 100-pin TQFP package • 165-pin FBGA package • Low capacitive bus loading • x18, x32, and x36 versions available
100-Pin TQFP1
OPTIONS
• Timing (Access/Cycle/MHz) 3.
5ns/6ns/166 MHz 4.
0ns/7.
5ns/133 MHz 5ns/10ns/100 MHz • Configurations 3.
3V I/O 512K x 18 256K x 32 256K x 36 2.
5V I/O 512K x 18 256K x 32 256K x 36 • Packages 100-pin TQFP (2-chip enable) 100-pin TQFP (3-chip enable) 165-pin, 13mm x 15mm FBGA • Operating Temperature Range Commercial (0°C to +70°C) Industrial (-40°C to +85°C)**
MARKING
-6 -7.
5 -10
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T S F* None IT
S a
e h
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U 4
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165-Pin FBGA
NOTE: 1.
JEDEC-standard MS-026 BHA (LQFP).
MT58L512L18P MT58L256L32P MT58L256L36P
* A Part Marking Guide for the FBGA devices can be found on Micron’s Web site—http://www.
micron.
com/support/index.
html.
** Industrial temperature range offered in specific speed grades and configurations.
Contact factory for more information.
MT58L512V18P MT58L256V32P MT58L256V36P
GENERAL DESCRIPTION
The Micron® SyncBurst™ SRAM family employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process.
Micron’s 8Mb...
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