440BX AGPset Spread Spectrum Frequency Synthesizer
Description
W149
440BX AGPset Spread Spectrum Frequency Synthesizer
Features
• Maximized EMI suppression using Cypress’s Spread Spectrum Technology • Single chip system frequency synthesizer for Intel® 440BX AGPset • Two copies of CPU output • Six copies of PCI output • One 48-MHz output for USB • One 24-MHz output for SIO • Two buffered reference outputs • One IOAPIC output • Thirteen SDRAM outputs provide support for 3 DIMMs • Spread Spectrum feature always enabled • I2C™ interface for programming • Power management control inputs • Smooth CPU frequency switching from 66.
8–124 MHz VDDQ3: .
.
.
.
3.
3V±5% VDDQ2: .
.
.
.
2.
5V±5% SDRAMIN to SDRAM0:12 Delay:.
3.
7 ns typ.
Table 1.
Mode Input Table[1] Mode 0 1 Table 2.
Pin Selectable Frequency Input Address FS2 1 1 1 1 0 0 0 0 FS1 1 1 0 0 1 1 0 0 FS0 1 0 1 0 1 0 1 0
[2]
Pin 2 PCI_STOP# REF0
CPU0:1 (MHz) 100 100 103 66.
8 83.
3 66.
8 124
PCI_F, 1:5 (MHz) 33.
3 (CPU/3) (Reserved) 33.
3 (CPU/3) 34.
3 (CPU/3) 33.
4 (CPU/2) 41.
7 (CPU/2) 33.
4 (CPU/2) 41.
3 (CPU/3)
Spread % –0.
5 ±0.
5 –0.
5 –0.
5 –0.
5 ±0.
5 –0.
5
Key Specifications
CPU Cycle-to-Cycle Jitter: .
250 ps CPU to CPU Output Skew: 175 ps PCI to PCI Output Skew: .
.
.
.
500 ps
Logic Block Diagram
VDDQ3 REF0/(PCI_STOP#) X1 X2 XTAL OSC
PLL Ref Freq
Pin Configuration
REF1/FS2
VDDQ2
I/O Pin Control
IOAPIC
VDDQ2 CPU0 PLL 1 ÷2/÷3 CPU1 VDDQ3 PCI_F/MODE PCI1 PCI2 PCI3 PCI4
SDATA SCLK
Stop Clock Control
VDDQ3 REF0/(PCI_STOP#) GND X1 X2 VDDQ3 PCI_F/MODE PCI1 GND PCI2 PCI3 PCI4 PCI5 VDDQ3 SDRAMIN GND SDRAM11 SDRAM10 VDDQ3 SDRAM9 SDRAM8 GND 2 SDAT A I C SCLK
{
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
VDDQ2 IOAPIC REF1/FS2* GND CPU0 CP...
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