PICO AMPERE DIODES
Description
PAD SERIES
Linear Integrated Systems
FEATURES DIRECT REPLACEMENT FOR SILICONIX PAD SERIES REVERSE BREAKDOWN VOLTAGE REVERSE CAPACITANCE ABSOLUTE MAXIMUM RATINGS1 @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature Operating Junction Temperature Maximum Power Dissipation Continuous Power Dissipation (PAD) Continuous Power Dissipation (J/SSTPAD) Maximum Currents Forward Current (PAD) Forward Current (J/SSTPAD) 50mA 10mA * Cathode tied to Case 300mW 350mW -65 to +150 °C -55 to +135 °C JPAD
TO-92 BOTTOM VIEW
A
1 3
PICO AMPERE DIODES
BVR ≥ -30V Crss ≤ 2.
0pF
PAD1,2,5
TO-72 BOTTOM VIEW
2
PAD*
TO-72 BOTTOM VIEW
2
K
K*
C
A
1
SSTPAD
SOT-23 TOP VIEW K
1 3
K 1
A 2
A
K
2
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL BVR VF Crss CHARACTERISTIC Reverse Breakdown Voltage Forward Voltage Total Reverse Capacitance PAD1,5 All Others ALL PAD ALL SSTPAD ALL JPAD MIN -45 -30 -35 0.
8 0.
5 1.
5 1.
5 0.
8 2 pF V IR = -1µA IF = 5mA VR = -5V, f = 1MHz TYP MAX UNITS CONDITIONS
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL CHARACTERISTIC (SST/J)PAD1 (SST/J)PAD2 (SST/J)PAD5 IR Maximum Reverse 2 Leakage Current (SST/J)PAD10 (SST/J)PAD20 (SST/J)PAD50 (SST/J)PAD100 (SST/J)PAD200 (SST/J)PAD500 PAD2 -1 -2 -5 -10 -20 -50 -100 -5 -10 -20 -50 -100 -200 -500 -5 -10 -20 -50 pA VR = -20V JPAD2 SSTPAD2 UNITS CONDITIONS
Linear Integrated Systems
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Figure 1.
Operational Amplifier Protection Input Differential Voltage limited to 0.
8V (typ) by JPADs D1 and D2.
Common Mode Input voltage limited by JPADs D3 and D4 to ±15V.
Figure 2.
Sample and Hold Circuit Typical Sample and Hold circuit with clipping.
JPAD diodes reduce offset voltages fed capacitively from the JFET switch gate.
FIGURE 1 FIGURE 2
+V
JPAD20 D1 D3 D2 D4 OP-27 +
-V D2
+V
JPAD5 D1
2N4117A
2N4393
C
ein
+15V -15V
CONTROL SIGNAL
R
VOUT
TO-72
Three Lead
0.
195 DIA.
0.
17...
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