KM416S4030C
Revision History
Revision 1 (May 1998)
- ICC2 N value (10mA) is changed to 12mA.
Preliminary CMOS SDRAM
Revision .2 (June 1998)
- tSH (-10 binning) is revised.
REV. 2 June '98
KM416S4030C
1M x 16Bit x 4 Banks Synchronous DRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS c...
