Quad 2-Input NOR Gate - Toshiba
Description
CMOS Digital Integrated Circuits Silicon Monolithic
74HC02D
74HC02D
1.
Functional Description
• Quad 2-Input NOR Gate
2.
General
The 74HC02D is a high speed CMOS 2-INPUT NOR GATE fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.
The internal circuit is composed of 3 stages, including a buffer output, which provide high noise immunity and stable output.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3.
Features
(1) Wide operating temperature range: Topr = -40 to 125 � (Note 1) (2) High speed: tpd = 6 ns (typ.
) at VCC = 5 V (3) Low power dissipation: ICC = 1.
0 µA (max) at Ta = 25 � (4) Balanced propagation delays: tPLH ≈ tPHL (5) Wide operating voltage range: VCC(opr) = 2.
0 to 6.
0 V Note 1: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after
July 2020.
4.
Packaging
SOIC14
©2016-2020
1
Toshiba Electronic Devices & Storage Corporation
Start of commercial production
2020-07
2020-10-21 Rev.
3.
0
5.
Pin Assignment
6.
Marking 7.
IEC Logic Symbol
74HC02D
©2016-2020
2
Toshiba Electronic Devices & Storage Corporation
2020-10-21 Rev.
3.
0
8.
Truth Table
74HC02D
A
B
Y
L
L
H
L
H
L
H
L
L
H
H
L
9.
Absolute Maximum Ratings (Note)
Characteristics
Symbol Note
Rating
Unit
Supply voltage
VCC
-0.
5 to 7.
0
V
Input voltage
VIN
-0.
5 to VCC + 0.
5
V
Output voltage Input diode current Output diode current Output current VCC/ground current
VOUT IIK IOK IOUT ICC
-0.
5 to VCC + 0.
5
V
±20
mA
±20
mA
±25
mA
±50
mA
Power dissipation Storage temperature
PD
(Note 1)
500
mW
Tstg
-65 to 150
�
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.
Using continuously under heavy loads (e.
g.
the application of high temperature/current/voltage and the significa...
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