8-BIT LATCHED DMOS POWER DRIVER - Allegro MicroSystems
Description
Data Sheet 26180.
122b
6B273
8-BIT LATCHED DMOS POWER DRIVER
CLEAR 1 IN 1 2 IN 2 3
OUT 1 4 OUT2 5 OUT 3 6 OUT4 7
IN 3 8 IN 4 9 GROUND 10
LATCHES LATCHES
VDD 20
LOGIC SUPPLY
19 IN 8
18 IN 7
17 OUT8
16 OUT7
15 OUT6
14 OUT 5
13 IN 6
12 IN 5 11 STROBE
Dwg.
PP-015-2A
Note that the A6B273KA (DIP) and the A6B273KLW (SOIC) are electrically identical and share a common terminal number assignment.
ABSOLUTE MAXIMUM RATINGS at TA = 25°C
Output Voltage, VO .
50 V Output Drain Current,
Continuous, IO .
150 mA* Peak, IOM 500 mA† Single-Pulse Avalanche Energy, EAS .
.
.
.
30 mJ Logic Supply Voltage, VDD .
.
.
7.
0 V Input Voltage Range, VI -0.
3 V to +7.
0 V Package Power Dissipation, PD .
.
.
See Graph Operating Temperature Range, TA .
.
.
-40°C to +125°C Storage Temperature Range, TS .
.
.
-55°C to +150°C
* Each output, all outputs on.
† Pulse duration ≤ 100 µs, duty cycle ≤ 2%.
Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges.
The A6B273KA and A6B273KLW combine eight (positive-edgetriggered D-type) data latches and DMOS outputs for systems requiring relatively high load power.
Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads.
The CMOS inputs and latches allow direct interfacing with microprocessor-based systems.
Use with TTL may require appropriate pull-up resistors to ensure an input logic high.
The DMOS output inverts the DATA input.
All of the output drivers are disabled (the DMOS sink drivers turned OFF) with the CLEAR input low.
The A6B273KA/KLW DMOS open-drain outputs are capable of sinking up to 500 mA.
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