DatasheetsPDF.com

54F109

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP

Description

SN54F109, SN74F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDFS047A – MARCH 1987 – REVISED OCTOBER 1993 Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain two independent J-K positive-edge-triggered flip-flops. A low level ...

Texas Instruments

54F109 PDF File

Similar Datasheet

54F10 TRIPLE 3-INPUT POSITIVE-NAND GATE - Texas Instruments
54F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP - Texas Instruments
54F11 Triple 3-Input AND Gate - Texas Instruments
54F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS - Texas Instruments
54F14 Hex Inverter Schmitt Trigger - National Semiconductor
54F151A 8-Input Multiplexer - National Semiconductor
54F151A 8-Input Multiplexer - NXP
54F153 Dual 4-Input Multiplexer - National Semiconductor
54F153 Dual 4-Line to 1-Line Multiplexer - Philips
54F153 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS - Texas Instruments

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)