R5F117GA Datasheet

R5F117GA MCU

RL78/I1D RENESAS MCU 1. OUTLINE 1.1 Features Ultra-low power consumption technology • VDD = 1.6 V to 3.6 V • HALT mode • STOP mode • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operatio.

Features

Ultra-low power consumption technology
• VDD = 1.6 V to 3.6 V
• HALT mode
• STOP mode
• SNOOZE mode RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (66.6 μs: @ 15 kHz operation with low-speed on-chip oscillator clock)
• Multiply/divide/multiply & accumulate instructions are supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8) × 4 banks
• On-chip RAM: 0.7 to 3 KB Code flash memory
• Code flash memory: 8 .