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VS-P135 Dataheets PDF



Part Number VS-P135
Manufacturers Vishay
Logo Vishay
Description Passivated Assembled Circuit Elements Power Modules
Datasheet VS-P135 DatasheetVS-P135 Datasheet (PDF)

www.vishay.com VS-P100 Series Vishay Semiconductors Power Modules, Passivated Assembled Circuit Elements, 25 A PACE-PAK (D-19) PRIMARY CHARACTERISTICS IO Type 25 A Modules - thyristor, standard Package PACE-PAK (D-19) FEATURES • Glass passivated junctions for greater reliability • Electrically isolated base plate • Available up to 1200 VRRM/VDRM • High dynamic characteristics • Wide choice of circuit configurations • Simplified mechanical design and assembly • UL E78996 approved • Mater.

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www.vishay.com VS-P100 Series Vishay Semiconductors Power Modules, Passivated Assembled Circuit Elements, 25 A PACE-PAK (D-19) PRIMARY CHARACTERISTICS IO Type 25 A Modules - thyristor, standard Package PACE-PAK (D-19) FEATURES • Glass passivated junctions for greater reliability • Electrically isolated base plate • Available up to 1200 VRRM/VDRM • High dynamic characteristics • Wide choice of circuit configurations • Simplified mechanical design and assembly • UL E78996 approved • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 DESCRIPTION The VS-P100 series of integrated power circuits consists of power thyristors and power diodes configured in a single package. With its isolating base plate, mechanical designs are greatly simplified giving advantages of cost reduction and reduced size. Applications include power supplies, control circuits and battery chargers. MAJOR RATINGS AND CHARACTERISTICS SYMBOL CHARACTERISTICS IO 85 °C 50 Hz ITSM 60 Hz 50 Hz I2t 60 Hz I2t VDRM, VRRM VISOL TJ TStg Range ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS TYPE NUMBER VS-P101, VS-P121, VS-P131 VS-P102, VS-P122, VS-P132 VS-P103, VS-P123, VS-P133 VS-P103, VS-P124, VS-P134 VS-P105, VS-P125, VS-P135 VRRM/VDRM, MAXIMUM REPETITIVE PEAK REVERSE AND PEAK OFF-STATE VOLTAGE V 400 600 800 1000 1200 VALUES 25 357 375 637 580 6365 400 to 1200 2500 -40 to +125 -40 to +125 VRSM, MAXIMUM NON-REPETITIVE PEAK REVERSE VOLTAGE V 500 700 900 1100 1300 UNITS A A A2s A2s V V °C °C IRRM MAXIMUM AT TJ MAXIMUM mA 10 Revision: 27-Jul-2018 1 Document Number: 93754 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com VS-P100 Series Vishay Semiconductors ON-STATE CONDUCTION PARAMETER Maximum DC output current at case temperature Maximum peak, one-cycle non-repetitive on-state or forward current Maximum I2t for fusing Maximum I2t for fusing Maximum value of threshold voltage Maximum level value of on-state slope resistance Maximum on-state voltage drop Maximum forward voltage drop Maximum non-repetitive rate of rise of turned-on current Maximum holding current Maximum latching current SYMBOL IO ITSM, IFSM I2t I2t VT(TO) rt1 VTM VFM dI/dt IH IL TEST CONDITIONS Full bridge t = 10 ms t = 8.3 ms No voltage reapplied t = 10 ms t = 8.3 ms t = 10 ms t = 8.3 ms 100 % VRRM reapplied No voltage reapplied Sinusoidal half wave, initial TJ = TJ maximum t = 10 ms t = 8.3 ms 100 % VRRM reapplied t = 0.1 ms to 10 ms, no voltage reapplied I2t for time tx = I2t · tx TJ = 125 °C VALUES 25 85 357 375 300 315 637 580 450 410 6365 0.82 TJ = 125 °C, average power = VT(TO) x IT(AV) + rt + (IT(RMS))2 12 ITM =  x IT(AV) TJ = 25 °C IFM =  x IF(AV) TJ = 25 °C TJ = 125 °C from 0.67 VDRM ITM =  x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs TJ = 25 °C anode supply = 6 V, resistive load, gate open TJ = 25 °C anode supply = 6 V, resistive load 1.35 1.35 200 130 250 UNITS A °C A A2s A2s V m V V A/μs mA BLOCKING PARAMETER Maximum critical rate of rise of off-state voltage Maximum peak reverse and off-state leakage current at VRRM, VDRM Maximum peak reverse leakage current RMS isolation voltage SYMBOL TEST CONDITIONS dV/dt IRRM, IDRM IRRM VISOL TJ = 125 °C, exponential to 0.67 VDRM gate open TJ = 125 °C, gate open circuit TJ = 25 °C 50 Hz, circuit to base, all terminals shorted,  TJ = 25 °C, t = 1 s VALUES 200 UNITS V/μs 10 mA 100 μA 2500 V TRIGGERING PARAMETER Maximum peak gate power Maximum average gate power Maximum peak gate current Maximum peak negative gate voltage SYMBOL PGM PG(AV) IGM -VGM Maximum gate voltage required to trigger VGT Maximum gate current required to trigger IGT Maximum gate voltage that will not trigger VGD Maximum gate current that will not trigger IGD TEST CONDITIONS TJ = -40 °C TJ = 25 °C TJ = 125 °C TJ = -40 °C TJ = 25 °C TJ = 125 °C Anode supply = 6 V resistive load TJ = 125 °C, rated VDRM applied VALUES 8 2 2 10 3 2 1 90 60 35 0.2 2 UNITS W A V V mA V mA Revision: 27-Jul-2018 2 Document Number: 93754 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com VS-P100 Series Vishay Semiconductors THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum junction operating and storage temperature range Maximum thermal resistance, junction to case per junction Maximum thermal resistance, case to heatsink.


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