Document
M16C/1N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
REJ03B0002-0100Z Rev.1.00
2004.10.20
1. Overview
The M16C/1N group consists of single-chip microcomputers that use high-performance silicon gate CMOS processes and have a on-chip M16C/60 series CPU core. The microcomputers are housed in 48-pin plastic mold QFP package. These single-chip microcomputers have both high function instructions and high instruction efficiency and feature a one-megabyte address space and the capability to execute instructions at high speed.
1.1 Applications
Automotive and industrial control systems, other automobile, other
Rev.1.00 Oct 20, 2004 page 1 of 29 REJ03B0002-0100Z
M16C/1N Group
1. Overview
1.2 Performance Overview
Table 1.1 gives an overview of the M16C/1N group performance specification.
Table 1.1 Performance overview
Item Performance
Number of basic instructions
91 instructions
Shortest instruction execution time 62.5 ns (when f(XIN)=16MHz)
Memory
ROM
See Table 1.2 Performance overview
size RAM
See Table 1.2 Performance overview
I/O port
P0 to P5: 37 lines
Multifunction T1
8 bits x 1
timer
TX, TY, TZ
8 bits x 3
TC 16 bits x 1
Serial I/O (UART or clock synchronous) x 2
A/D converter
x 12 channels
(maximum resolution: 10 bits)
(Expandable up to 14 channels)
D/A converter
8 bits x 1
CAN controller
1 channel, 2.0B active
Watchdog timer
15 bits x 1 (with prescaler)
Interrupts
15 internal causes, 8 external causes, 4 software causes
Clock generating circuits
3 internal circuits
Power supply voltage
4.2 V to 5.5V (when f(XIN)=16MHz)
Power consumption
70mW(VCC=5.0V, f(XIN)=16MHz)
I/O I/O withstand voltage 5V
characteristics Output current
5mA (10mA:LED drive port)
Device configuration
CMOS silicon gate
Package
48-pin LQFP
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M16C/1N Group
1.3 Block Diagram
Figure 1.1 shows block diagram of the M16C/1N group.
1. Overview
8
82
8
8
3
I/O ports Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Internal peripheral functions
Timer
Timer 1 (8 bits) Timer X (8 bits) Timer Y (8 bits) Timer Z (8 bits) Timer C (16 bits)
Watchdog timer
(15 bits)
A/D converter
(10 bits X 12 channels, expandable to 14 channels)
UART/clock synchronous SI/O (8 bits X 2 channels)
D/A converter
(8 bits X 1 channel)
System clock generator
XIN-XOUT XCIN-XCOUT On-chip oscillation
CAN controller (1 channel)
M16C/60 series 16-bit CPU core
Registers
RR0H0H RR0L0L R1H R1L R2 R3 A0 A1 FB
SB
Program counter
PC Stack pointers
ISP USP Vector table INTB Flag register FLG
Memory
ROM (Note 1)
RAM (Note 2)
Multiplier
Note 1: ROM size depends on MCU type. Note 2: RAM size depends on MCU type.
Figure 1.1 Block diagram
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M16C/1N Group
1.4 Performance Overview
Table 1.2 shows performance overview.
Table 1.2 Performance overview
Type No. M301N2M4T-XXXFP(D) M301N2M8T-XXXFP(D) M301N2F8TFP(D) M301N2F8FP(D) (D): Under development
ROM 32Kbytes
64Kbytes
RAM 1Kbytes
3Kbytes
1. Overview
Package 48P6Q-A
As of June 2004 Remarks Mask ROM
Flash memory
Type No. M30 1N 2 M 4 T - XXX FP
Package type: FP: Package 48P6Q-A
ROM No. Omitted for flash memory version
Indicates differences in characteristics and usage etc: Nothing: Common T: Automobiles
ROM size: 4: 32 Kbytes
8: 64 Kbytes
Memory type: M: Mask ROM version F: Flash memory version
Indicates pin count, etc (The value itself has no specific meaning)
M16C/1N Group
M16C Family
Figure 1.2 Type No., memory size, and package
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M16C/1N Group
1.5 Pin Configuration
Figure 1.3 shows pin configurations (top view) of the M16C/1N group.
1. Overview
P07/AN0 IVCC P30/TXOUT VSS P31/TZOUT VCC P40/ANEX0 P41/ANEX1 P42/INT3 P43/INT1 P32/TYOUT P33/TCIN
36 35 34 33 32 31 30 29 28 27 26 25
P06/AN1 P05/AN2 P04/AN3
VREF P52
P51(CRx)(Note 1) P50(CTx)(Note 1) P03/AN4/CRx(Note 1) P02/AN5/CTx(Note 1)
P01/AN6 P00/AN7 P37/TxD1/RxD1
37 38 39 40 41 42 43 44 45 46 47 48
M16C/1N Group
24 P44/INT2 23 P45/INT0 22 P10/KI0/AN8 21 P11/KI1/AN9 20 P12/KI2/AN10 19 P20 18 NC 17 P21 16 P13/KI3/AN11 15 P14/TxD0 14 P15/RxD0 13 P16/CLK0
P36/CLK1 1 P35/RxD1 2 P34/CLKS1/DA 3
CNVSS 4 P47/XCIN 5 P46/XCOUT 6
RESET 7 XOUT 8 VSS 9 XIN 10 VCC 11
P17/CNTR0 12
Package: 48P6Q-A Note 1: Either P02, P03 or P50, P51 can be selected as CAN0 I/O ports by software.
Figure 1.3 Pin configuration diagram (top view)
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M16C/1N Group
1. Overview
1.6 Pin Description
Table 1.3 shows the pin description.
Table 1.3 Pin Description
Pin name VCC, VSS IVCC CNVSS RESET XIN XOUT VREF P00 to P07
P10 to P17
P20 to P21
Signal name I/O type
Function
Power supply Input input
IVCC
Input
CNVSS
Input
Supply 4.2 to 5.5 V to the VCC pin. Supply 0 V to the VSS pin.
Connect a capacitor (0.1 µF) between this pin and VSS. Connect it to the VSS pin via resistance (about 5 kΩ).
Reset input Input
A "L" on this input resets the.