HD74HC540

HD74HC540, HD74HC541 Octal Buffers/Line Drivers (with 3-state outputs) REJ03D0628-0200 (Previous ADE-205-508) Rev.2.00 Mar 30, 2006 Description The HD74HC540 is an inverting buffer and the HD74HC541 is a non-inverting buffer. The 3-state control gate operates as a two-input NOR such that if either G1 or G2 are high, all eight outputs are in the high-impedance state. Features High Speed Operation: tpd = 11.5 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC540P HD74HC541P DILP-20 pin PRDP0020AC-B P (DP-20NEV) HD74HC540FPEL SOP-20 pin (JEITA) HD74HC541FPEL PRSP0020DD-B (FP-20DAV) FP HD74HC540RPEL SOP-20 pin (JEDEC) HD74HC541RPEL PRSP0020DC-A (FP-20DBV) RP HD74HC540TELL TSSOP-20 pin HD74HC541TELL PTSP0020JB-A (TTP-20DAV) T Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) EL (1,000 pcs/reel) ELL (2,000 pcs/reel) Function Table Inputs G1 G2 LL LL HX XH H : high level L : low level X : irrelevant Z : off (high-impedance) state of a 3-state output A L H X X Output Y HD74HC540 HD74HC541 HL LH ZZ ZZ Rev.2.00 Mar 30, 2006 page 1 of 8 HD74HC540, HD74HC541 Pin Arrangement HD74HC540 G1 1 A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 A7 8...