HD74HC4020

HD74HC4020 14-stage Binary Counter REJ03D0645-0200 (Previous ADE-205-531) Rev.2.00 Mar 30, 2006 Description The HD74HC4020 is a 14 stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Features High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC4020P DILP-16 pin PRDP0016AE-B (DP-16FV) P HD74HC4020FPEL SOP-16 pin (JEITA) PRSP0016DH-B (FP-16DAV) FP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) Function Table Clock X Note: 1. X: Don’t care Reset L L H Outputs State No change Advance to next state All output are low Rev.2.00 Mar 30, 2006 page 1 of 6 HD74HC4020 Pin Arrangement Q12 1 Q13 2 Q14 3 Q6 4 Q5 5 Q7 6 Q4 7 GND 8 Q13 Q12 Q11 Q14 Q10 Q6 Q8 Q5 Q9 Q7 R Q4 Q1 C (Top view) 16 VCC 15 Q11 14 Q10 13 Q8 12 Q9 11 Reset 10 Clock 9 Q1 Block Diagram Clock Reset Q1 Q4 Q5 Q12 Q13 Q14 CQ CRQ CQ CRQ CQ CRQ CQ CRQ CQ CRQ CQ CRQ Timing Diagram Clock Reset Q1 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 12 4 8 16 32 64 128 256 512 1,024 2...