SI53313

Si53313 DUAL 1:5 LOW-JITTER, ANY-FORMAT BUFFER/LEVEL TRANSLATOR (<1.25 GHZ) Features  2 independent banks of 5x  Output clock division: /1, /2, /4 (dc to differential outputs 725 MHz for /2 and /4)  Ultra-low additive jitter: 45 fs rms  Wide frequency range:  Independent VDD and VDDO: 1.8/2.5/3.3 V dc to 1.25 GHz  Excellent power supply noise  Any-format input with pin selectable rejection (PSRR) output formats: LVPECL, Low Power  Small size: 44-QFN (7 mm x 7 mm) LVPECL, LVDS, CML, HCSL,  RoHS compliant, Pb-free LVCMOS  Industrial temperature range:  Asynchronous output enable –40 to +85 °C  Low output-output skew: <70 ps Applications  High-speed clock distribution  Ethernet switch/router  Optical Transport Network (OTN)  SONET/SDH  PCI Express Gen 1/2/3  Storage  Telecom  Industrial  Servers  Backplane clock distribution Ordering Information: See page 27. Pin Assignments Si53313 VDDOA Q3 Q3 Q4 Q4 GND Q5 Q5 Q6 Q6 VDDOB 34 35 36 37 38 39 40 41 42 43 44 Description DIVA 1 33 DIVB The Si53313 is an ultra low jitter dual 1:5 differential buffer with pin-selectable SFOUTA[1] 2 SFOUTA[0] 3 32 SFOUTB[1] 31 SFOUTB[0] output clock signal format and divider selection. The Si53313 utilizes Silicon Q2 4 30 Q7 Laboratories' advanced CMOS technology to fanout clocks from dc to 1.25 GHz with guaranteed low additive jitter, low skew, and low propagation delay variability. Q2 GND Q1 5 6 7 GND PAD 29 Q7 28 NC 27 Q8 The Si53313 featur...