SI53311

Si53311 1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX (<1.25 GHZ) Features  6 differential or 12 LVCMOS outputs  Low output-output skew: <50 ps  Ultra-low additive jitter: 100 fs rms  Low propagation delay variation:  Wide frequency range: <400 ps 1 MHz to 1.25 GHz  Independent VDD and VDDO :  Any-format input with pin selectable 1.8/2.5/3.3 V output formats: LVPECL, Low Power  Excellent power supply noise LVPECL, LVDS, CML, HCSL, rejection (PSRR) LVCMOS  Selectable LVCMOS drive strength to  2:1 mux with hot-swappable inputs tailor jitter and EMI performance  Asynchronous output enable  Output clock division: /1, /2, /4  Small size: 32-QFN (5 mm x 5 mm)  RoHS compliant, Pb-free  Industrial temperature range: –40 to +85 °C Ordering Information: See page 25. Applications  High-speed clock distribution  Ethernet switch/router  Optical Transport Network (OTN)  SONET/SDH  PCI Express Gen 1/2/3  Storage  Telecom  Industrial  Servers  Backplane clock distribution Description The Si53311 is an ultra low jitter six output differential buffer with pin-selectable output clock signal format and divider selection. The Si53311 features a 2:1 mux, making it ideal for redundant clocking applications. The Si53311 utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from 1 MHz to 1.25 GHz with guaranteed low additive jitter, low skew, and low propagation delay variability. The Si53311 features minimal cr...