Document
Si52112-B5/B6
PCI-EXPRESS GEN 3 DUAL OUTPUT CLOCK GENERATOR
Features
PCI-Express Gen 1, Gen 2,
Triangular spread spectrum
Gen 3, and Gen 4 common clock profile for maximum EMI
compliant
reduction (Si52112-B6)
Gen 3 SRNS Compliant
Extended Temperature:
Low power HCSL differential
–40 to 85 °C
output buffers
3.3 V Power supply
Supports Serial-ATA (SATA) at Small package 10-pin TDFN
100 MHz
(3x3 mm)
No termination resistors required Si52112-B5 does not support
25 MHz Crystal Input or Clock
spread spectrum outputs
input
Si52112-B6 supports 0.5% down
spread outputs
Applications
Network attached storage Multi-function printer
Wireless access point Routers
Description
Si52112-B5/B6 is a high-performance, PCIe clock generator that can source two PCIe clocks from a 25 MHz crystal or clock input. The clock outputs are compliant to PCIe Gen 1, Gen 2, Gen 3, Gen 3 SRNS and Gen 4 common clock specifications. The ultra-small footprint (3x3 mm) and industry leading low power consumption make Si52112-B5/B6 the ideal clock solution for consumer and embedded applications. Measuring PCIe clock jitter is quick and easy with the Silicon Labs PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcie-learningcenter.
Ordering Information: See page 13
Pin Assignments
VDD 1 XOUT 2 XIN/CLKIN 3
VSS 4 VSS 5
10 VDD 9 DIFF2 8 DIFF2 7 DIFF1 6 DIFF1
Patents pending
Functional Block Diagram
VDD
XIN/CLKIN XOUT
PLL Divider
DIFF1 DIFF2
VSS
Rev 1.2 12/15
Copyright © 2015 by Silicon Laboratories
Si52112-B5/B6
Si52112-B5/B6
2 Rev 1.2
TABLE OF CONTENTS
Si52112-B5/B6
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Crystal Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1. Crystal Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2. Calculating Load Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3. Test and Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1. 10-Pin TDFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2. 8-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6. Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1. TDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.2. TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7. Recommended Design Guideline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Rev 1.2
3
Si52112-B5/B6
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter Supply Voltage (extended) Supply Voltage (commercial)
Symbol VDD(extended) VDD(commercial)
Test Condition 3.3 V ± 5% 3.3 V ± 10%
Table 2. DC Electrical Specifications
Parameter Operating Voltage Operating Supply Current Input Pin Capacitance Output Pin Capacitance
Symbol VDD IDD CIN COUT
Test Condition 3.3 V ± 10% Full Active
Input Pin Capacitance Output Pin Capacitance
Min 3.13 2.97
Min 2.97 — — —
Typ 3.3 3.3
Typ 3.30 —
3 —
Max Unit 3.46 V 3.63 V
Max Unit 3.63 V 17 mA
5 pF 5 pF
4 Rev 1.2
Si52112-B5/B6
Table 3. AC Electrical Specifications
Parameter
Symbol
Test Condition
Min
Crystal Long-term Accuracy Clock Input CLKIN Duty Cycle CLKIN Rise and Fall Times
CLKIN Cycle-to-Cycle Jitter CLKIN Long Term Jitter Input High Voltage Input Low Voltage Input High Current Input Low Current DIFF Clocks Duty Cycle Skew Output Frequency Frequency Accuracy Slew Rate
LACC
TDC TR/TF
TCCJ TLTJ VIH VIL IIH IIL
TDC TSKEW FOUT FACC
tr/f2
Measured at VDD/2 differential —
Measured at VDD/2 Measured between 0.2 VDD and
0.8 VDD Measured at VDD/2 Measured at VDD/2
XIN/CLKIN pin
XIN/CLKIN pin
XIN/CLKIN pin, VIN = VDD XIN/CLKIN pin, 0 < VIN <0.8
45 0.5
— — 2 — — –35
Measured at 0 V differential Measured at 0 V differential
VDD = 3.3 V
All outpu.