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SIR640ADP Dataheets PDF



Part Number SIR640ADP
Manufacturers Vishay
Logo Vishay
Description N-Channel MOSFET
Datasheet SIR640ADP DatasheetSIR640ADP Datasheet (PDF)

www.vishay.com SiR640ADP Vishay Siliconix N-Channel 40 V (D-S) MOSFET PRODUCT SUMMARY VDS (V) 40 RDS(on) (Ω) MAX. 0.0020 at VGS = 10 V 0.0025 at VGS = 4.5 V ID (A) a 100 100 PowerPAK® SO-8 Single D D8 D7 D6 5 Qg (TYP.) 28.5 nC 6.15 mm 1 Top View 5.15 mm 1 2S 3S 4S G Bottom View Ordering Information: SR640ADP-T1-GE3 (lead (Pb)-free and halogen-free) FEATURES • TrenchFET® power MOSFET • Low Qg for high efficiency • 100 % Rg and UIS tested • Material categorization: for definitions o.

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www.vishay.com SiR640ADP Vishay Siliconix N-Channel 40 V (D-S) MOSFET PRODUCT SUMMARY VDS (V) 40 RDS(on) (Ω) MAX. 0.0020 at VGS = 10 V 0.0025 at VGS = 4.5 V ID (A) a 100 100 PowerPAK® SO-8 Single D D8 D7 D6 5 Qg (TYP.) 28.5 nC 6.15 mm 1 Top View 5.15 mm 1 2S 3S 4S G Bottom View Ordering Information: SR640ADP-T1-GE3 (lead (Pb)-free and halogen-free) FEATURES • TrenchFET® power MOSFET • Low Qg for high efficiency • 100 % Rg and UIS tested • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • Synchronous rectification • DC/DC converter • DC/AC inverter G D S N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150 °C) Pulsed Drain Current (t = 100 μs) Continuous Source-Drain Diode Current Single Pulse Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipation Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) d, e TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C TC = 25 °C TA = 25 °C L = 0.1 mH TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C VDS VGS ID IDM IS IAS EAS PD TJ, Tstg LIMIT 40 ± 20 100 a 100 a 41.6 b, c 33.3 b, c 350 94 5.6 b, c 40 80 104 66.6 6.25 b, c 4 b, c -55 to +150 260 UNIT V A mJ W °C THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICAL MAXIMUM UNIT Maximum Junction-to-Ambient b, f Maximum Junction-to-Case (Drain) t ≤ 10 s Steady State RthJA RthJC 15 0.9 20 °C/W 1.2 Notes a. Package limited. b. Surface mounted on 1" x 1" FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 54 °C/W. S15-0073-Rev. B, 26-Jan-15 1 Document Number: 62870 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com SiR640ADP Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS Static Drain-Source Breakdown Voltage VGS(th) Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current On-State Drain Current a Drain-Source On-State Resistance a Forward Transconductance a Dynamic b VDS ΔVGS(th)/TJ VGS(th) IGSS IDSS ID(on) RDS(on) gfs VGS = 0 V, ID = 250 μA ID = 250 μA VDS = VGS, ID = 250 μA VDS = 0 V, VGS = ± 20 V VDS = 40 V, VGS = 0 V VDS = 40 V, VGS = 0 V, TJ = 55 °C VDS ≥ 5 V, VGS = 10 V VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 20 A VDS = 15 V, ID = 20 A Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Ciss Coss Crss Qg VDS = 20 V, VGS = 0 V, f = 1 MHz VDS = 20 V, VGS = 10 V, ID = 20 A Gate-Source Charge Gate-Drain Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Qgs Qgd Rg td(on) tr td(off) tf td(on) tr td(off) tf VDS = 20 V, VGS = 4.5 V, ID = 20 A f = 1 MHz VDD = 20 V, RL = 2 Ω ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω VDD = 20 V, RL = 2 Ω ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω Continuous Source-Drain Diode Current IS TC = 25 °C Pulse Diode Forward Current (t = 100 μs) ISM Body Diode Voltage VSD IS = 5 A Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Reverse Recovery Fall Time Qrr ta IF = 10 A, dI/dt = 100 A/μs, TJ = 25 °C Reverse Recovery Rise Time tb Notes a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. MIN. TYP. MAX. UNIT 40 - - V - -4.6 - mV/°C 0.9 - 2 V - - ± 100 nA - -1 μA - - 10 30 - - A - 0.00165 0.00200 Ω - 0.00205 0.00250 - 82 - S - 4240 - - 3930 - - 230 - - 60 90 - 28.5 43 - 9.6 - - 5.1 - 0.4 1.2 2 - 17 34 - 6 12 - 44 85 - 8 16 - 38 75 - 70 140 - 42 80 - 12 24 pF nC Ω ns - - 94 A - - 350 - 0.7 1.1 V - 79 160 ns - 80 160 nC - 22 - ns - 57 - Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-0073-Rev. B, 26-Jan-15 2 Document Number: 62870 For technical questi.


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