Document
Ordering number : ENA1875
LV5068V
Bi-CMOS IC
Low power consumption and high efficiency Step-down Switching Regulator Controller
http://onsemi.com
Overview
LV5068V is 1ch step-down switching regulator. The operation current is about 80μA, and low power consumption is achieved.
Functions
• 1ch SBD rectification controller IC • Maximum value of light load mode current is 80μA. • Built-in OCP circuit with P-by-P method • When P-by-P is generated continuously, it shifts to the HICCUP operation. • If connect C-HICCUP to GND pin, then latch-off when over current. • The oscillatory frequency can be set by the external pin. The oscillatory frequency is 300 kHz to 2.2MHz • Built-in UVLO, TSD • Synchronous driving with external signal
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Input voltage Allowable pin voltage
VIN max PDR,HDRV,RSNS, ILIM,EN,PG
VIN-PDR REF
SS,FB,COMP,RT C-HICCUP,SYNC
Allowable power dissipation
Pd max
Specified substrate *1
Operating temperature
Topr
Storage temperature
Tstg
*1: Specified substrate 114.3mm×76.1mm×1.6mm3 glass-epoxy
Ratings
45 VIN
6 6 REF
Unit V V
V V V
0.74 -40 to +85 -55 to +150
W ˚C ˚C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013 August, 2013
N1010 SY 20101102-S00002 No.A1875-1/6
LV5068V
Recommended Operating Conditions at Ta = 25°C
Parameter Input voltage range
Symbol VIN
Conditions
Electrical Characteristics at Ta = 25°C, VIN = 15V
Parameter
Symbol
Conditions
Reference voltage Internal reference voltage Pch drive voltage Saw wave oscillator Oscillatory frequency ON/OFF circuit IC start-up voltage Disable voltage Soft start circuit Soft start source current Soft start sink current UVLO circuit UVLO release voltage UVLO lock voltage Error amplifier Input bias current Error amplifier gain Output sink current Output source current Over current limit circuit Reference current Over current detection comparator offset voltage RSNS pin input range HICCUP timer start-up cycle HICCUP comparator threshold voltage HICCUP timer change current PWM comparator Maximum On-duty Logic output Power good “L” sink current Power good “H” leakage current Power good threshold voltage Power good hysteresis Output Output on-resistance (High) Output on-resistance (Low) Output on-current (High) Output on-current (Low) The entire device Stand-by current Light load mode consumption current Thermal shutdown
*2: Design certification
Vref VPDR
FOSC
VCNT_ON VCNT_OFF
ISS_SC ISS_SK
VUVLON VUVLOF
IEA_IN GEA IEA_OSK IES_OSC
ILIM1 VLIM_OFS
VRSNS NLCYCLES VtHIC
IHIC
D max
IPWRGD_L IPWRGD_H VtPG VPG_H
RONH RONL IONH IONL
ICCS ISLEEP1
TSD
IOUT=0 to -5mA RT=470kΩ
EN>1.5V EN<0.3V, SS=4V FB=COMP FB=COMP
FB=1.75V FB=0.75V
PG=5V PG=5V
EN<0.3V EN>1.5V, No switching *2
Ratings
4.5 to 40
Unit V
Ratings min typ
Unit max
1.241 VIN-5.5
1.260 VIN-5.0
1.279 VIN-4.5
V V
280 330 380 kHz
1.5 VIN V 0 0.3 V
1.3 2.0 2.7 μA 1.0 1.6 2.2 mA
3.3 3.7 4.1 V 2.5 2.9 3.3 V
-100
-50 100 nA
100 250 400 μA/V
-40 -20 -10 μA
10 20 40 μA
48.4 -5
VIN-0.175
1.2 1
55
15 1.26
2
61.6 +5
μA mV
VIN 1.32
V cycle
V
3 μA
95 %
4 5 6 mA 0 1 μA 1.0 1.1 1.2 V 40 50 60 mV
3 3 500 500
Ω Ω mA mA
0 1 μA 30 55 80 μA
150 170 190 ˚C
No.A1875-2/6
Package Dimensions
unit : mm (typ) 3178B
5.2 16
9
LV5068V
1.2
0.8 0.74
Pd max -- Ta
Specified circuit board : 114.3×76.1×1.6mm3 glass epoxy board
Allowable power dissipation, Pd max - W
4.4 6.4 0.5
1
(0.33)
0.65
8 0.22
0.15
0.1 (1.3) 1.5max
SANYO : SSOP16(225mil)
0.4 0.38
0 -40 -20 0 20 40 60 80 100 120
Ambient temperature, Ta - C
Block Diagram
VIN 2.EN
Hi:ON Lo:OFF
11.C-HICCUP
C8
14.COMP FB 15.FB
R6
C6 12.SS
C7
1.PG
13.NC
Wake-up
Band-gap
Bias
1.26V
+ -
uvlo.comp
TSD
-HIC CUP.comp +
enable
REF
Pch Drive
+ -
pwm.comp
15pluse
+
-
counter
-
++ PbyP.comp
err.amp
+ -
VIN
PG.comp
enable
+ -
1.1V
+ -
SQ
RQ
slope
clk
OSC
Level-shift
PDR
R3
16.REF
C5
7.PDR
C3
4.VIN
VIN
R1 R2 C1 C10
5.RSNS
3.ILIM
6.HDRV
Q1
L
D1
C9 R4 FB
9. SYNC 10.RT 8.GND
R8 R7
C2 R5
No.A1875-3/6
Pin Assignment
LV5068V
PG 1 EN 2 ILIM 3 VIN 4 RSNS 5 HDRV 6 PDR 7 GND 8
TOP VIEW
LV5068V
16 REF 15 FB 14 COMP 13 N.C. 12 SS 11 C-HICCUP 10 RT 9 SYNC
Pin Descriptions
Pin Pin name
No. 1 PG
Descriptions
Power good pin. Connect to open drain of MOS-FET in ICs inside. Setting output voltage to "L", when FB voltage is 1.05V or less
2 EN
ON/OFF pin
3 ILIM
4 VIN 5 RSNS
For current detection. Sink current is about 55μA. The current limiter comparator works when an external resistor is connected between this pin and VIN, and if the voltage of this resistor is less than the voltage of RSNS then Pch MOS is turned off. This operation is reset eac.