ICS8530I-01

Low Skew, 1-To-16 Differentail -To-3.3V LVPECL Fanout Buffer ICS8530I-01 DATA SHEET General Description The ICS8530I-01 is a low skew, 1-to-16 Differential- to-3.3V LVPECL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to-peak input voltages as small as 150mV as long as the common mode voltage is within the specified minimum and maximum range. Guaranteed output and part-to-part skew characteristics make the ICS8530I-01 ideal for those clock distribution applications demanding well defined performance and repeatability. Features Sixteen differential 3.3V LVPECL output pairs CLK, nCLK input pair CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL Maximum output frequency: 500MHz Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input Output skew: 75ps (maximum) Additive phase jitter, RMS @ 106.25MHz: 0.162ps (typical) Full 3.3V supply voltage -40°C to 85°C ambient operating temperature Available in both standard (RoHS 5) and lead-free (RoHS 6) packages Block Diagram CLK0 Pulldown nCLK0 Pullup Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8 ICS8530DYI-01 REVISION A FEBRUARY 22, 2011 Pin Assignment VCCO nQ12 Q12 nQ13 Q13 VEE nQ14 Q14 nQ15 Q15 VCCO nCLK VCCO Q11 nQ11 Q10 nQ10 VEE Q9 nQ9 Q8 nQ8 VCCO VCC...