Document
BLF182XR; BLF182XRS
Power LDMOS transistor
Rev. 1 — 23 July 2015
Objective data sheet
1. Product profile
1.1 General description
A 250 W extremely rugged LDMOS power transistor for broadcast and industrial applications in the HF to 600 MHz band.
Table 1. Application information
Test signal
f
(MHz)
pulsed RF
108
VDS
PL
(V) (W)
50 250
Gp (dB) 28
D (%) 72
1.2 Features and benefits
Easy power control Integrated ESD protection Excellent ruggedness High efficiency Excellent thermal stability Designed for broadband operation (HF to 600 MHz) Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
Industrial, scientific and medical applications Broadcast transmitter applications
NXP Semiconductors
BLF182XR; BLF182XRS
Power LDMOS transistor
2. Pinning information
Table 2. Pinning Pin Description BLF182XR (SOT1121A) 1 drain1 2 drain2 3 gate1 4 gate2 5 source
BLF182XRS (SOT1121B) 1 drain1 2 drain2 3 gate1 4 gate2 5 source
[1] Connected to flange.
3. Ordering information
Simplified outline Graphic symbol
[1]
V\P
[1]
V\P
Table 3. Ordering information
Type number Package
Name Description
BLF182XR -
flanged LDMOST ceramic package; 2 mounting holes; 4 leads
BLF182XRS -
earless flanged ceramic package; 4 leads
Version SOT1121A
SOT1121B
4. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDS drain-source voltage VGS gate-source voltage Tstg storage temperature Tj junction temperature
Min 6 65 [1] -
Max 135 +11 +150 225
Unit V V C C
[1] Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF calculator.
BLF182XR_BLF182XRS
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 July 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 11
NXP Semiconductors
BLF182XR; BLF182XRS
Power LDMOS transistor
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter
Conditions
Typ Unit
Rth(j-c) Zth(j-c)
thermal resistance from junction to case
transient thermal impedance from junction to case
Tj = 115 C
Tj = 150 C; tp = 100 s; = 20 %
[1][2] [3]
K/W K/W
[1] Tj is the junction temperature. [2] Rth(j-c) is measured under RF conditions. [3] See .
6. Characteristics
Table 6. DC characteristics Tj = 25 C; per section unless otherwise specified.
Symbol Parameter
Conditions
V(BR)DSS drain-source breakdown voltage
VGS = 0 V; ID = 1.0 mA
VGS(th) VGSq IDSS IDSX
IGSS RDS(on)
gate-source threshold voltage gate-source quiescent voltage drain leakage current drain cut-off current
gate leakage current drain-source on-state resistance
VDS = 10 V; ID = 100 mA
VDS = 50 V; ID = 50 mA
VGS = 0 V; VDS = 50 V
VGS = VGS(th) + 3.75 V; VDS = 10 V
VGS = 11 V; VDS = 0 V
VGS = VGS(th) + 3.75 V; ID = 3.5 A
Min 135
1.25 -
-
Typ -
1.8 1.6 14.3
0.43
Max -
2.25 1.4 -
140 -
Unit V
V V A A
nA
Table 7. AC characteristics Tj = 25 C; per section unless otherwise specified.
Symbol Parameter
Conditions
Crs Ciss Coss
feedback capacitance input capacitance output capacitance
VGS = 0 V; VDS = 50 V; f = 1 MHz VGS = 0 V; VDS = 50 V; f = 1 MHz VGS = 0 V; VDS = 50 V; f = 1 MHz
Min Typ - 0.7 - 116 - 37
Max Unit - pF - pF - pF
Table 8. RF characteristics
Test signal: pulsed RF; tp = 100 s; = 20 %; f = 108 MHz; RF performance at VDS = 50 V; IDq = 100 mA; Tcase = 25 C; unless otherwise specified; in a class-AB production test circuit.
Symbol
Parameter
Conditions
Min Typ Max Unit
Gp power gain
PL = 250 W
RLin input return loss PL = 250 W
D
drain efficiency
PL = 250 W
28 10 72
-
dB dB %
BLF182XR_BLF182XRS
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 July 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 11
NXP Semiconductors
BLF182XR; BLF182XRS
Power LDMOS transistor
&RVV S)
DDD
9'69
Fig 1.
VGS = 0 V; f = 1 MHz.
Output capacitance as a function of drain-source voltage; typical values per section
7. Test information
7.1 Ruggedness in class-AB operation
The BLF182XR and BLF182XRS are capable of withstanding a load mismatch corresponding to VSWR > 65 : 1 through all phases under the following conditions: VDS = 50 V; IDq = 100 mA; PL = 250 W pulsed; f = 108 MHz.
7.2 Impedance information
JDWH =L JDWH
Fig 2. Definition of transistor impedance
GUDLQ
=/
GUDLQ DDQ
Table 9. Typical push-pull impedance Simulated Zi and ZL device impedance; impedance info at VDS = 50 V and PL = 250 W.
f (MHz)
Zi ()
ZL ()
108
BLF182XR_BLF182XRS
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 July 2015
© NXP Semicond.