LR24C128

LESHAN RADIO COMPANY, LTD. 128K bits (16,384 X 8) / 256K bits (32,768 X 8) Two-wire Serial EEPROM Two-wire Serial EEPROM LR 24C128/LR 24C256 Features Two-wire Serial Interface VCC = 1.8V to 5.5V Bi-directional Data Transfer Protocol Internally Organized LR24C128, 16,384 X 8 (128K bits) LR24C256, 32,768 X 8 (256K bits) 400 kHz (1.8V, 2.7V, 5V) Compatibility 64-byte Page (128K/256K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle (5 ms max) High-reliability 1 Million Write Cycles guaranteed Data Retention > 100 Years Operating Temperature: -40 to +85 8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages Pin Configuration Ordering Infomation LR24Cxxx: PDIP8 LR24CxxxD: SOP8 LR24CxxxT: TSSOP8 Description LR24C128/LR24C256 provides 131,072/262,144 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The LR24C128/LR24C256 is available in space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages and is accessed via a two-wire serial interface. 1 Pin Descriptions LESHAN RADIO COMPANY, LTD. Block Diagram 2 LESHAN RADIO COMPANY, LTD. DEVICE/PAGE ADDRESSES ( A1 and A0): The A1 and A0 pins are device address inputs that are hard wired for the 24C128 / 24 C256. Four 128k/256k devices may be addressed on a single bus system (device addressing is discussed in d...