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SAML21E16A Dataheets PDF



Part Number SAML21E16A
Manufacturers Atmel
Logo Atmel
Description SMART ARM-based Flash MCU
Datasheet SAML21E16A DatasheetSAML21E16A Datasheet (PDF)

SMART ARM-based Microcontroller SAM L21E / SAM L21G / SAM L21J DATASHEET PRELIMINARY Introduction Atmel® | SMART SAM L21 is a series of Ultra low-power microcontrollers using the 32-bit ARM® Cortex®-M0+ processor at max. 48MHz (2.46 CoreMark®/MHz) and up to 256KB Flash and 44KB of SRAM in a 32-64 pin package. The sophisticated power management technologies, such as power domain gating, SleepWalking, Ultra low-power peripherals and more, allow for very low current consumptions. The highly configu.

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SMART ARM-based Microcontroller SAM L21E / SAM L21G / SAM L21J DATASHEET PRELIMINARY Introduction Atmel® | SMART SAM L21 is a series of Ultra low-power microcontrollers using the 32-bit ARM® Cortex®-M0+ processor at max. 48MHz (2.46 CoreMark®/MHz) and up to 256KB Flash and 44KB of SRAM in a 32-64 pin package. The sophisticated power management technologies, such as power domain gating, SleepWalking, Ultra low-power peripherals and more, allow for very low current consumptions. The highly configurable peripherals include a touch controller supporting capacitive interfaces with proximity sensing. Features • Processor – ARM Cortex-M0+ CPU running at up to 48MHz • Single-cycle hardware multiplier • Micro Trace Buffer • Memories – 32/64/128/256KB in-system self-programmable Flash – 1/2/4/8KB Flash Read-While-Write section – 4/8/16/32KB SRAM Main Memory – 2/4/8/8KB SRAM Low power Memory • System – Power-on reset (POR) and brown-out detection (BOD) – Internal and external clock options – External Interrupt Controller (EIC) – 16 external interrupts – One non-maskable interrupt – Two-pin Serial Wire Debug (SWD) programming, test and debugging interface • Low Power – Idle, Standby, Backup, and Off sleep modes – SleepWalking peripherals Atmel-42385C-SAM L21_Datasheet_Preliminary-03/2015 – Static and Dynamic Power Gating Architecture – Battery backup support – Two Performance Levels – Embedded Buck/LDO regulator supporting on-the-fly selection • Peripherals – 16-channel Direct Memory Access Controller (DMAC) – 12-channel Event System – Up to five 16-bit Timer/Counters (TC) including one low-power TC, each configurable as: • 16-bit TC with two compare/capture channels • 8-bit TC with two compare/capture channels • 32-bit TC with two compare/capture channels, by using two TCs – Two 24-bit and one 16-bit Timer/Counters for Control (TCC), with extended functions: • Up to four compare channels with optional complementary output • Generation of synchronized pulse width modulation (PWM) pattern across port pins • Deterministic fault protection, fast decay and configurable dead-time between complementary output • Dithering that increase resolution with up to 5 bit and reduce quantization error – 32-bit Real Time Counter (RTC) with clock/calendar function – Watchdog Timer (WDT) – CRC-32 generator – One full-speed (12Mbps) Universal Serial Bus (USB) 2.0 interface • Embedded host and device function • Eight endpoints – Up to six Serial Communication Interfaces (SERCOM) including one low-power SERCOM, each configurable to operate as either: • USART with full-duplex and single-wire half-duplex configuration • I2C up to 3.4MHz • SPI • LIN slave – One AES encryption engine – One True Random Generator (TRNG) – One Configurable Custom Logic (CCL) – One 12-bit, 1MSPS Analog-to-Digital Converter (ADC) with up to 20 channels • Differential and single-ended input • Automatic offset and gain error compensation • Oversampling and decimation in hardware to support 13-, 14-, 15-, o.


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