Document
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
Rev. 4 — 1 December 2015
Product data sheet
1. General description
The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals.
2. Features and benefits
Complies with JEDEC standard no. 7A ESD protection:
HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Wave and pulse shapers Astable multivibrators Monostable multivibrators
NXP Semiconductors
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
4. Ordering information
Table 1. Ordering information Type number Package
Temperature range 74HC132D 40 C to +125 C 74HCT132D 74HC132DB 40 C to +125 C 74HCT132DB 74HC132PW 40 C to +125 C 74HCT132PW
Name SO14
SSOP14
TSSOP14
5. Functional diagram
Description
plastic small outline package; 14 leads; body width 3.9 mm
Version SOT108-1
plastic shrink small outline package; 14 leads; body SOT337-1 width 5.3 mm
plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
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Fig 1. Logic symbol
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Fig 2. IEC logic symbol
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Fig 3. Logic diagram (one Schmitt trigger)
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 19
NXP Semiconductors
6. Pinning information
6.1 Pinning
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
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Fig 4. Pin configuration SO14 and (T)SSOP14
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6.2 Pin description
Table 2. Symbol 1A to 4A 1B to 4B 1Y to 4Y GND VCC
Pin description
Pin 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14
7. Functional description
Description data input data input data output ground (0 V) supply voltage
Table 3. Input nA L L H H
Function table[1]
nB L H L H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Output nY H H H L
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 19
NXP Semiconductors
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
8. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC supply voltage IIK input clamping current IOK output clamping current IO output current
VI < 0.5 V or VI > VCC + 0.5 .