XC3S200

1 DS099 June 27, 2013 Module 1: Introduction and Ordering Information DS099 (v3.1) June 27, 2013 Introduction Features Architectural Overview Array Sizes and Resources User I/O Chart Ordering Information Module 2: Functional Description DS099 (v3.1) June 27, 2013 Input/Output Blocks (IOBs) IOB Overview SelectIO™ Interface I/O Standards Configurable Logic Blocks (CLBs) Block RAM Dedicated Multipliers Digital Clock Manager (DCM) Clock Network Configuration Module 3: DC and Switching Characteristics DS099 (v3.1) June 27, 2013 DC Electrical Characteristics Absolute Maximum Ratings Supply Voltage Specifications Recommended Operating Conditions DC Characteristics Switching Characteristics I/O Timing Internal Logic Timing DCM Timing Configuration and JTAG Timing Spartan-3 FPGA Family Data Sheet Product Specification Module 4: Pinout Descriptions DS099 (v3.1) June 27, 2013 Pin Descriptions Pin Behavior During Configuration Package Overview Pinout Tables Footprints © Copyright 2003–2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, Artix, Kintex, Zynq, Vivado, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners. DS099 June 27, 2013 Product Specification www.xilinx.com 1 8 Spartan-3 FPGA Family: Introduction and Ordering I...