N
NDS9405 Single P-Channel Enhancement Mode Field Effect Transistor
February 1996
General Description
These P-Channel ...
N
NDS9405 Single P-Channel Enhancement Mode Field Effect
Transistor
February 1996
General Description
These P-Channel enhancement mode power field effect
transistors are produced using National's proprietary, high cell density, DMOS technology. This very high density process is been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
-4.3A, -20V. RDS(ON) = 0.10Ω @ VGS = -10V
High density cell design for extremely low RDS(ON) High power and current handling capability in a widely used surface mount package.
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54 63 72 81
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS VGSS ID
PD
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous TA = 25°C
- Continuous TA = 70°C
- Pulsed
TA = 25°C
Maximum Power Dissipation
(Note 1a) (Note 1a)
(Note 1a)
(Note 1b) (Note 1c)
TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS
RθJA RθJC
Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
NDS9405 -20 ± 20 ± 4.3 ± 3.3 ± 20 2.5
1.2 1
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