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K9GBGD8U0M-B Dataheets PDF



Part Number K9GBGD8U0M-B
Manufacturers Samsung
Logo Samsung
Description FLASH MEMORY
Datasheet K9GBGD8U0M-B DatasheetK9GBGD8U0M-B Datasheet (PDF)

K9GBGD8X0M K9LCGD8X1M K9PFGD8X7M K9HDGD8X5M K9PFGD8X5M Enterprise Advance FLASH MEMORY K9GBGD8X0M K9LCGD8X1M K9HDGD8X5M K9PFGD8X7M K9PFGD8X5M INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "A.

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K9GBGD8X0M K9LCGD8X1M K9PFGD8X7M K9HDGD8X5M K9PFGD8X5M Enterprise Advance FLASH MEMORY K9GBGD8X0M K9LCGD8X1M K9HDGD8X5M K9PFGD8X7M K9PFGD8X5M INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar appli cations where Product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. * Samsung Electronics reserves the right to change products or specification without notice. 1 K9GBGD8X0M K9LCGD8X1M K9PFGD8X7M K9HDGD8X5M K9PFGD8X5M Enterprise Document Title Samsung Toggle Mode DDR NAND Specification Revision History Revision No History 0.0 0.1 0.1.5 0.2 0.3 1. Initial issue 1. Restriction of Command latch cycle is noted. 2. Output driver strength impedence values for VccQ=1.8V is added. 1. K9LCGD8U1M-B, K9LCGD8S1M-B are added. 2. K9HDGD8U5M-B, K9HDGD8S5M-B are added. 3. K9PFGD8U7M-B, K9PFGD8S7M-B are added. 4. Ball pitch is changed from 1.4mm to 1.0mm. 1. Package type is changed from 100FBGA t o 180FBGA. 2. Output Driver Strength Values are changed. 3. Note 1 of 5.16 is amended. (Icc1 30mA -> 50mA) 1. Max. tR is changed from 400us to 80us. 2. Typ. tPROG is changed from 1.6ms to 2ms. 0.4 1. K9PFGD8U5M-B, K9PFGD8S5M-B are added. 2. Package dimension is amended. 3. Chip2 Status command(F2h) is added for K9PFGD8X5M. 4. Functional block diagram is modified. 5. A34 is added for K9PFGD8X5M. 6. Absolute maximum ratings are noted for each VccQ. 7. Stand-by current of TTL(ISB1) is deleted. 8. Test conditions of Output High and Low Voltage Level are noted. 9. Min. valid blocks of all products are amended. 10. tR is noted for typical and maximum value. 11. Device resetting time of Erase is changed from 500us to 100us. 12. Timing of Status Read Cycle before Power On sequence is described. 13. Device ID of K9PFGD8X5M is added. 14. Device ID table definitions is amended. 15. Get feature command is deleted. 16. Busy time for Set and Get feature(tFEAT) is deleted. 17. Timing diagram of Driver Strength Register Setting is amended. 18. Interleaving operations for K9PFGD8X5M are added. Advance FLASH MEMORY Draft Date May 26, 2009 Jun. 15, 2009 Jul. 14, 2009 Remark Advance Sep. 1, 2009 Sep. 24, 2009 Oct. 22 , 2009 The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near your office. 2 K9GBGD8X0M K9LCGD8X1M K9PFGD8X7M K9HDGD8X5M K9PFGD8X5M 1.0 Introduction 1.1 GENERAL DESCRIPTION Enterprise Advance FLASH MEMORY Offered in 4Gx8bit, the K9GBGD8X0M is a 32G-bit NAND Flash Memory with spare 2,076M-bit. The device is offered in 3.3V Vcc & VccQ. (3.3V & 1.8V) and also uses the toggle mode interface to achieve a high data transfer rate. Its NAND cell provides the most cost-effective solution for the solid state application market. A program operation can be performed in typical 2ms on the (8K+512)Byte page and an erase operation can be performed in typical 1.5ms on a (1M+64K)Byte block. Data in the data register can be read out at 133Mbps with 15ns cycle time. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. The K9GBGD8X0M is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring nonvolatility. 1.2 FEATURES • Voltage Supply : - Core : 2.7V ~ 3.6V - I/O : 2.7V ~ 3.6V / 1.7V ~ 1.95V • Organization - Memory Cell Array : (4G + 259.5M) x 8bit - Data Register : (8K + 512) x 8bit • Automatic Program and Erase - Page Program : (8K + 512)Byte - Block Erase : (1M + 64K)Byte • Page Read Operation - Page Size : (8K + 512)Byte - Random Read : 80µs(Typ.) , 100µs(Max.) - Data Transfer rate : 133Mbps(VccQ:3.3V) / 66Mbps(VccQ:1.8V) • Fast Write Cycle Time - Page Program time : 2ms(Typ.) - Block Erase Time : 1.5ms(Typ.) • Command/Address/Data Multiplexed I/O Port • Toggle Mode DDR Data Interface • Hardware Data Protection - Program/Erase Lockout During Power Transitions • Reliable CMOS Floating-Gate Technology.


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