Document
CEM6188
Dual N-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
60V, 7.3A, RDS(ON) = 26mΩ @VGS = 10V. RDS(ON) = 35mΩ @VGS = 4.5V.
Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. Surface mount Package.
D1 D1 D2 D2 876 5
SO-8
1
123 4 S1 G1 S2 G2
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage Gate-Source Voltage
VDS 60
VGS ±20
Drain Current-Continuous Drain Current-Pulsed a
ID 7.3 IDM 29.2
Maximum Power Dissipation
PD 2
Operating and Store Temperature Range
TJ,Tstg
-55 to 150
Thermal Characteristics
Parameter Thermal Resistance, Junction-to-Ambient b
Symbol RθJA
Limit 62.5
Units V V A A W C
Units C/W
This is preliminary information on a new product in development now . Details are subject to change without notice .
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Rev 1. 2011.Mar http://www.cet-mos.com
CEM6188
Electrical Characteristics TA = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Off Characteristics
Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics c
BVDSS IDSS IGSSF IGSSR
VGS = 0V, ID = 250µA VDS = 60V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V
Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics d
VGS(th) RDS(on)
VGS = VDS, ID = 250µA VGS = 10V, ID =6A VGS = 4.5V, ID =4A
Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics d
Ciss Coss Crss
VDS = 25V, VGS = 0V, f = 1.0 MHz
Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time
td(on) tr
td(off)
VDD = 30V, ID = 6A, VGS = 10V, RGEN = 4.7Ω
Turn-Off Fall Time
tf
Total Gate Charge Gate-Source Charge Gate-Drain Charge
Qg Qgs
VDS = 48V, ID = 6A, VGS = 10V
Qgd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c
IS VSD
VGS = 0V, IS = 1.5A
Min 60
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Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.
Typ
20 29
1120 125 75
15 5 38 10 24 6 6
Max Units
1 100 -100
V µA nA nA
3V 26 mΩ 35 mΩ
pF pF pF
30 ns 10 ns 76 ns 20 ns 31 nC
nC nC
1.5 A 1.2 V
2
VTH, Normalized Gate-Source Threshold Voltage
C, Capacitance (pF)
ID, Drain Current (A)
24 VGS=10,8,7V 20
16 12 8
VGS=4V
4 VGS=3V 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
VDS, Drain-to-Source Voltage (V)
Figure 1. Output Characteristics
1200 1000
Ciss
800
600
400
200
0 0
Coss Crss
5 10 15 20 25
VDS, Drain-to-Source Voltage (V)
Figure 3. Capacitance
1.3 VDS=VGS 1.2 ID=250µA
1.1
1.0
0.9
0.8
0.7
0.6 -50 -25 0 25 50 75 100 125 150
TJ, Junction Temperature( C)
Figure 5. Gate Threshold Variation with Temperature
3
RDS(ON), Normalized RDS(ON), On-Resistance(Ohms)
IS, Source-drain current (A)
ID, Drain Current (A)
CEM6188
15 25 C
12 TJ=125 C
9
-55 C
6
3
0 0.0
2
4
6 8 10
VGS, Gate-to-Source Voltage (V)
Figure 2. Transfer Characteristics
2.2 ID=6A 1.9 VGS=10V
1.6
1.3
1.0
0.7
0.4 -100 -50 0 50 100 150 200
TJ, Junction Temperature( C) Figure 4. On-Resistance Variation
with Temperature
VGS=0V
101
100
10-1 0.4 0.6 0.8 1.0 1.2 1.4
VSD, Body Diode Forward Voltage (V)
Figure 6. Body Diode Forward Voltage Variation with Source Current
VGS, Gate to Source Voltage (V) ID, Drain Current (A)
10 VDS=48V ID=6A
8
6
4
2
0 0 5 10 15 20 25
Qg, Total Gate Charge (nC) Figure 7. Gate Charge
VDD
VIN RL D VOUT
VGS RGEN G
S
Figure 9. Switching Test Circuit
CEM6188
102 RDS(ON)Limit
101
100
10ms 100ms 1s
DC
10-1
TA=25 C
TJ=150 C
10-2
Single 10-2
Pulse 10-1
100
101
102
VDS, Drain-Source Voltage (V)
Figure 8. Maximum Safe Operating Area
td(on) VOUT
t on tr
td(off)
90%
10% INVERTED
toff tf
90%
10%
VIN
10%
50%
90% 50%
PULSE WIDTH
Figure 10. Switching Waveforms
r(t),Normalized Effective Transient Thermal Impedance
100 D=0.5
10-1
0.2 0.1 0.05
0.02
10-2 10-4
Single Pulse
10-3
10-2
10-1
100
Square Wave Pulse Duration (sec)
PDM
t1 t2
1. R JA (t)=r (t) * R JA 2. R JA=See Datasheet 3. TJM-TA = P* R JA (t) 4. Duty Cycle, D=t1/t2
101
102
Figure 11. Normalized Thermal Transient Impedance Curve
4
.