NB6L56

NB6L56 2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer with LVPECL Outputs Multi−Level Inputs w/ Internal Termination The NB6L56 is a high performance Dual 2−to−1 Differential Clock or Data multiplexer. The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin. This feature allows the NB6L56 to accept various Differential logic level standards, such as LVPECL, CML or LVDS. Outputs are 800 mV LVPECL signals. For interface options see Figures 12 − 15. The NB6L56 produces minimal Clock or Data jitter operating up to 2.5 GHz or 2.5 Gbps, respectively. As such, the NB6L56 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The NB6L56 is offered in a low profile 5 mm x 5 mm 32−pin QFN package and is a member of the ECLinPS MAX™ family of high performance Clock / Data products. Application notes, models, and support documentation are available at www.onsemi.com. Features Maximum Input Data Rate > 2.5 Gbps Maximum Input Clock Frequency > 2.5 GHz Jitter < 1 ps RMS RJ (Data) < 10 ps PP DJ (Data) < 0.7 ps RMS Crosstalk induced jitter (CLOCK) 360 ps Max Propagation Delay 180 ps Max Rise and Fall Times Operating Range: VCC = 2.5 ± 5% (2.375 V to 2.625 V) VCC =3.3 ± 10% (3.0 V to 3.6 V) Internal 50 W Input Termination Resistors Industrial Temp. Range (−40°C to 85°C) QFN−32 Package These are Pb−Free Devices Applications Clock and Data Distribution Networking ...