NB3M8304C

NB3M8304C 3.3 V 200 MHz 1:4 LVCMOS/LVTTL Low Skew Fanout Buffer Description The NB3M8304C is 1:4 fanout buffer with LVCMOS/LVTTL input and output. The device supports the core supply voltage of 3.3 V (VDD pin) and output supply voltage of 2.5 V or 3.3 V (VDDO pin). The VDDO pin powers the four single ended LVCMOS/LVTTL outputs. The NB3M8304C is Form, Fit and Function (pin to pin) compatible to ICS8304 and ICS8304I. The NB3M8304C is qualified for industrial operating temperature range. Features Input Clock Frequency up to 200 MHz Low Output to Output Skew: 45 ps max Low Part to Part Skew: 500 ps max Low Additive RMS Phase Jitter Input Clock Accepts LVCMOS/ LVTTL Levels Operating Voltage: ♦ Core Supply: VDD = 3.3 V ±5% ♦ Output Supply: VDDO = 3.3 V ±5% or 2.5 V ±5% Operating Temperature Range: ♦ Industrial: −40°C to +85°C These Devices are Pb−Free and are RoHS Compliant www.onsemi.com 8 1 SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAMS* 8 8304C ALYWG G 1 A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. Figure 1. Block Diagram © Semiconductor Components Industries, LLC, 2014 December, 2014 − Rev. 3 1 Publication Order Number: NB3M8304C/D NB3M8304C Figure 2. Pin Configuration (Top View) Table 1. PIN DESCRIPTION Pin Number Name 1 VDDO 2 VDD 3 CLK 4 GND 5, 6, 7, 8 Q[0:3] Type Output ...