RJK03R4DPA

Preliminary Datasheet RJK03R4DPA MOS1 30 V, 20 A, 7.0 mΩ max. MOS2 30 V, 50 A, 2.3 mΩ max. Built in SBD Dual N-channel Power MOS FET High Speed Power Switching R07DS0888EJ0110 Rev.1.10 Oct 29, 2012 Features  Low on-resistance  Capable of 4.5 V gate drive  High density mounting  Pb-free  Halogen-free Outline RENESAS Package code: PWSN0008DD-B (Package name: WPAK-D(3)) 5 678 1 G1 234 D1 D1 D1 8 G2 4 32 1 MOS1 9 S1/D2 5678 9 S2 S2 S2 56 7 4321 (Bottom View) MOS2 and Schottky Barrier Diode 1, 8 Gate 2, 3, 4, 9 Drain 5, 6, 7, 9 Source Absolute Maximum Ratings Item Symbol Drain to source voltage Gate to source voltage Drain current Drain peak current Reverse drain current Avalanche current Avalanche energy Channel dissipation VDSS VGSS ID ID(pulse)Note1 IDR IAP Note 2 EAS Note 2 Pch Note3 Channel temperature Tch Storage temperature Tstg Notes: 1. PW  10 s, duty cycle  1% 2. Value at Tch = 25C, Rg  50  3. Tc=25C MOS1 30 ±20 20 80 20 12 14.4 15 150 –55 to +150 Ratings MOS2 30 ±12 50 200 50 22 48 35 150 –55 to +150 (Ta = 25°C) Unit V V A A A A mJ W °C °C R07DS0888EJ0110 Rev.1.10 Oct 29, 2012 Page 1 of 10 RJK03R4DPA Preliminary Electrical Characteristics MOS1 Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resista...