PH2530AL

PH2530AL N-channel TrenchMOS logic level FET Rev. 05 — 14 January 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing and consumer applications. 1.2 Features and benefits „ High efficiency due to low switching and conduction losses „ Suitable for logic level gate drive sources 1.3 Applications „ Consumer applications „ Desktop Voltage Regulator Module (VRM) „ Notebook Voltage Regulator Module (VRM) 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 30 V ID drain current Tmb = 25 °C; VGS = 10 V; [1] - - 100 A see Figure 1 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 88 W Dynamic characteristics QGD QG(tot) gate-drain charge total gate charge VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14 and 15 - 6.5 - nC - 27 - nC Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 15 A; Tj = 25 °C - 1.79 2.4 mΩ [1] Continuous current is limited by package. NXP Semiconductors PH2530AL N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1S source 2S source 3S source 4G gate mb D mounting base; connected to drain 3. Ordering information Simplified outline mb 12...