Document
STW11NK100Z STW12NK95Z
N-channel 950V - 0.69Ω - 10A - TO-247 Zener - Protected SuperMESH™ PowerMOSFET
General features
www.DataSheet4U.com Type
VDSS (@Tjmax)
RDS(on)
ID
PW
STW12NK95Z 950 V < 0.90Ω 10 A 230W
■ Gate charge minimized ■ 100% avalanche tested ■ Extremely high dv/dt capability
Description
The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications.
Applications
■ Switching application
TO-247
Internal schematic diagram
Order codes
Part number STW12NK95Z
Marking W12NK95Z
Package TO-247
Packaging Tube
August 2006
Rev 2
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Contents
Contents
STW12NK95Z
1
2
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3 4 5
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STW12NK95Z
1 Electrical ratings
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Table 1. Absolute maximum ratings
Symbol
Parameter
VDS VDGR VGS
ID ID IDM(1) PTOT
Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20KΩ) Gate-source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC=100°C Drain current (pulsed) Total dissipation at TC = 25°C Derating Factor
VESD (G-S) Gate source ESD (HBM-C=100pF, R=1,5KΩ) dv/dt(2) Peak diode recovery voltage slope
TJ Operating junction temperature Tstg Storage temperature
1. Pulse width limited by safe operating area 2. ISD ≤10A, di/dt ≤200A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX
Table 2. Thermal data
Symbol
Parameter
Rthj-case Rthj-a
Tl
Thermal resistance junction-case Max
Thermal resistance junction-ambient Max
Maximum lead temperature for soldering purpose
Table 3. Avalanche characteristics
Symbol
Parameter
Avalanche current, repetitive or not-repetitive IAR (pulse width limited by Tj Max)
Single pulse avalanche energy EAS (starting Tj=25°C, Id=Iar, Vdd=50V)
Electrical ratings
Value 950 950 ± 30 10 6.3 40 230 1.85 6000 4.5
-55 to 150
Unit V V V A A A W
W/°C V
V/ns
°C
Value 0.54 50
300
Unit °C/W °C/W
°C
Value 10 500
Unit A mJ
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Electrical ratings
STW12NK95Z
1.1
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Table 4. Gate-source zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
BVGSO Gate-source breakdown voltage Igs=± 1mA (Open Drain) 30
V
Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.
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STW12NK95Z
2 Electrical characteristics
Electrical characteristics
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(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown voltage
ID = 1mA, VGS= 0
IDSS
Zero gate voltage drain current (VGS = 0)
VDS = Max rating, VDS = Max rating, Tc = 125°C
IGSS VGS(th) RDS(on)
Gate body leakage current (VGS = 0)
VGS = ± 20V
Gate threshold voltage
VDS = VGS, ID = 100µA
Static drain-source on resistance
VGS = 10V, ID = 5 A
Min. Typ. Max. Unit 950 V
1 µA 50 µA
±10 µA 3 3.75 4.5 V
0.69 0.9 Ω
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Ciss Coss Crss
Forward transconductance VDS =15V, ID = 5A
Input capacitance Output capacitance Reverse transfer capacitance
VDS =25V, f=1 MHz, VGS=0
12
3500 280 58
S
pF pF pF
Cosseq(2).
Equivalent output capacitance
VGS=0, VDS =0V to 760V
117
pF
Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge
VDD=760V, ID = 10A VGS =10V (see Figure 15)
113 nC 19 152 nC 60 nC
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
Table 7. Switching times
Symbol
Parameter
td(on) tr
Turn-on Delay Time Rise Time
td(off) tf
Turn-off Delay Time Fall Time
Test conditions
VDD=475V, ID=5A, RG=4.7Ω, VGS=10V (see Figure 14)
VDD=475V, ID=5A, RG=4.7Ω, VGS=10V (see .