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UPA2821T1L Dataheets PDF



Part Number UPA2821T1L
Manufacturers Renesas
Logo Renesas
Description MOS FIELD EFFECT TRANSISTOR
Datasheet UPA2821T1L DatasheetUPA2821T1L Datasheet (PDF)

μPA2821T1L MOS FIELD EFFECT TRANSISTOR PreliminaryData Sheet R07DS0753EJ0100 Rev.1.00 May 25, 2012 Description The μPA2821T1L is N-channel MOS Field Effect Transistor designed for power management applications of a notebook computer and Lithium-Ion battery protection circuit. Features • VDSS = 30 V (TA = 25°C) • Low on-state resistance ⎯ RDS(on) = 3.8 mΩ MAX. (VGS = 10 V, ID = 26 A) • 4.5 V Gate-drive available • Small surface mount package (8-pin HVSON (3333)) • Pb-free, Halogen Free Orderin.

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μPA2821T1L MOS FIELD EFFECT TRANSISTOR PreliminaryData Sheet R07DS0753EJ0100 Rev.1.00 May 25, 2012 Description The μPA2821T1L is N-channel MOS Field Effect Transistor designed for power management applications of a notebook computer and Lithium-Ion battery protection circuit. Features • VDSS = 30 V (TA = 25°C) • Low on-state resistance ⎯ RDS(on) = 3.8 mΩ MAX. (VGS = 10 V, ID = 26 A) • 4.5 V Gate-drive available • Small surface mount package (8-pin HVSON (3333)) • Pb-free, Halogen Free Ordering Information Part No. Lead Plating Packing Package μPA2821T1L-E1-AT ∗1 Pure Sn (Tin) Tape 3000 p/reel 8-pin HVSON (3333) μPA2821T1L-E2-AT ∗1 typ. 0.028 g Note: ∗1. Pb-free (This product does not contain Pb in external electrode and other parts.) Absolute Maximum Ratings (TA = 25°C) Item Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Drain Current (pulse) ∗1 Total Power Dissipation ∗2 Total Power Dissipation (PW = 10 sec) ∗2 Total Power Dissipation (TC = 25°C) Channel Temperature Storage Temperature Single Avalanche Current ∗3 Signal Avalanche Energy ∗3 Symbol VDSS VGSS ID(DC) ID(pulse) PT1 PT2 PT3 Tch Tstg IAS EAS Ratings 30 ±20 ±26 ±104 1.5 3.8 52 150 −55 to +150 18 32.4 Unit V V A A W W W °C °C A mJ Thermal Resistance Channel to Ambient Thermal Resistance ∗2 Rth(ch-A) Channel to Case (Drain) Thermal Resistance Rth(ch-C) 83.3 2.4 °C/W °C/W Notes: ∗1. PW ≤ 10 μs, Duty Cycle ≤ 1% ∗2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt ∗3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH R07DS0753EJ0100 Rev.1.00 May 25, 2012 Page 1 of 6 μPA2821T1L Electrical Characteristics (TA = 25°C) Item Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance ∗1 Drain to Source On-state Resistance ∗1 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Symbol IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG MIN. 1.0 14 Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage ∗1 Reverse Recovery Time Reverse Recovery Charge Note: ∗1. Pulsed QGS QGD VF(S-D) trr Qrr TYP. 3.0 4.9 2490 820 740 29 69 98 54 51 32 4 22 0.9 49 41 MAX. 1 ±10 2.5 3.8 10.5 Chapter Title Unit μA μA V S mΩ mΩ pF pF pF ns ns ns ns nC nC nC nC V ns nC Test Conditions VDS = 30 V, VGS = 0 V VGS = ±16 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 5 V, ID = 6.5 A VGS = 10 V, ID = 26 A VGS = 4.5 V, ID = 6.5 A VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 15 V, ID = 13 A, VGS = 10 V, RG = 10 Ω VGS = 10 V, VGS = 5 V VDD = 15 V, ID = 26 A IF = 26 A, VGS = 0 V IF = 26 A, VGS = 0 V, di/dt = 100 A/μs TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω L VDD BVDSS ID VDD IAS VDS Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. RG PG. VGS 0 τ τ = 1 μs Duty Cycle ≤ 1% RL VDD VGS VGS Wave Form 10% 0 VDS 90% VDS VDS Wave Form 0 td(on) VGS 90% 90% 10% 10% tr td(off) tf ton toff D.U.T. IG = 2 mA PG. 50 Ω RL VDD R07DS0753EJ0100 Rev.1.00 May 25, 2012 Page 2 of 6 dT - Percentage of Rated Power - % μPA2821T1L Typical Characteristics (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 140 120 100 80 60 40 20 0 0 25 50 75 100 125 150 175 TC - Case Temperature - °C ID - Drain Current - A Chapter Title FORWARD BIAS SAFE OPERATING AREA 1000 100 10 1 ID ( p uls e) ID ( D C ) 1 ms R D S( o n ) L imite d (VGS = 10 V) 500 μ s PW = 100 μ s 200 μ s DC Power Dissipation Limited 0.1 TC = 25ºC Single Pulse 0.01 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V rth(t) - Transient Thermal Resistance - °C/W 1000 100 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH Rth(ch-A) = 83.3ºC/W 10 1 0.1 0.01 100 μ Single pulse Rth(ch-A): Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt 1m 10 m 100 m 1 PW - Pulse Width - s Rth(ch-C) = 2.4ºC/W 10 100 1000 ID - Drain Current - A DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 120 100 VGS = 10 V 80 4.5 V 60 40 20 0 0 Pulsed 0.2 0.4 0.6 0.8 VDS - Drain to Source Voltage - V ID - Drain Current - A FORWARD TRANSFER CHARACTERISTICS 100 10 Tch = 150°C 75°C 25°C 1 –55°C 0.1 0.01 0.001 0 VDS = 10 V Pulsed 12345 VGS - Gate to Source Voltage - V R07DS0753EJ0100 Rev.1.00 May 25, 2012 Page 3 of 6 RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ VGS(off) – Gate to Source Cut-off Voltage - μPA2821T1L GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 3 2 1 0 -50 VDS = 10 V, ID = 1.0 mA 0 50 100 150 Tch - Channel Temperature - °C DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 8 7 Pulsed 6 5 4 VGS = 4.5 V 3 10 V 2 1 0 1 10 100 1000 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 8 Pulsed 6 VGS = 4.5 V ID = 6.5 A 4 VGS = 10 V 2 ID = 26A 0 -50 0 50 100 150 .


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