NuMicro™ M058/M0516 Data Sheet
6.2 System Manager
The following functions are included in system manager section
System Memory Map
System management registers for Part Number ID, chip reset and on-chip module reset ,
multi-functional pin control
System Timer (SysTick)
Nested Vectored Interrupt Controller (NVIC)
System Control registers
6.2.2 System Reset
The system reset includes one of the list below event occurs. For these reset event flags can be
read by RSTRC register.
The Power-On Reset (POR)
The low level on the /RESET pin
Watchdog Time Out Reset (WDT)
Low Voltage Reset (LVR)
Brown-Out-Detected Reset (BOD)
6.2.3 System Power Architecture
In this device, the power architecture is divided into three segments.
Analog power from AVDD and AVSS provides the power for analog module operation.
Digital power from VDD and VSS supplies the power to the internal regulator which
provides a fixed 2.5V power for digital operation and I/O pins.
The outputs of internal voltage regulator, which is LDO, require an external capacitor which
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Publication Release Date: May 30, 2011