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ST7LITE30F2 Dataheets PDF



Part Number ST7LITE30F2
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description 8-BIT MCU
Datasheet ST7LITE30F2 DatasheetST7LITE30F2 Datasheet (PDF)

ST7LITE3xF2 8-bit MCU with single voltage Flash, data EEPROM, ADC, timers, SPI, LINSCI™ Features ■ Memories – 8 Kbytes program memory: single voltage extended Flash (XFlash) Program memory with read-out protection, In-Circuit Programming and In-Application programming (ICP and IAP), data retention: 20 years at 55°C. – 384 bytes RAM – 256 bytes data EEPROM with read-out protection. 300K write/erase cycles guaranteed, data retention: 20 years at 55°C. ■ Clock, Reset and Supply Management – Enhanc.

  ST7LITE30F2   ST7LITE30F2



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ST7LITE3xF2 8-bit MCU with single voltage Flash, data EEPROM, ADC, timers, SPI, LINSCI™ Features ■ Memories – 8 Kbytes program memory: single voltage extended Flash (XFlash) Program memory with read-out protection, In-Circuit Programming and In-Application programming (ICP and IAP), data retention: 20 years at 55°C. – 384 bytes RAM – 256 bytes data EEPROM with read-out protection. 300K write/erase cycles guaranteed, data retention: 20 years at 55°C. ■ Clock, Reset and Supply Management – Enhanced reset system – Enhanced low voltage supervisor (LVD) for main supply and an auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures – Clock sources: Internal RC 1% oscillator, crystal/ceramic resonator or external clock – Optional x4 or x8 PLL for 4 or 8 MHz internal clock – Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt ■ I/O Ports – Up to 15 multifunctional bidirectional I/O lines – 7 high sink outputs ■ 5 Timers – Configurable Watchdog Timer – Two 8-bit Lite Timers with prescaler, 1 realtime base and 1 input capture – Two 12-bit Auto-reload Timers with 4 PWM outputs, input capture and output compare functions QFN20 SO20 DIP20 ■ 2 Communication Interfaces – Master/slave LINSCI™ asynchronous serial interface – SPI synchronous serial interface ■ Interrupt Management – 10 interrupt vectors plus TRAP and RESET – 12 external interrupt lines (on 4 vectors) ■ A/D Converter – 7 input channels – 10-bit resolution ■ Instruction Set 8-bit data manipulation – 63 basic instructions with illegal opcode detection – 17 main addressing modes – 8 x 8 unsigned multiply instructions ■ Development Tools – Full hardware/software development package – DM (Debug module) Table 1. Device summary Features Program memory - bytes RAM (stack) - bytes Data EEPROM - bytes Peripherals Operating Supply CPU Frequency Operating Temperature Packages ST7LITE30F2 ST7LITE35F2 ST7LITE39F2 8K 384 (128) - - 256 Lite Timer, Autoreload Timer, SPI, LINSCI, 10-bit ADC 2.7V to 5.5V Up to 8Mhz (w/ ext OSC up to 16MHz) Up to 8Mhz (w/ ext OSC up to 16MHz and int 1MHz RC 1% PLLx8/4MHz) -40°C to +125°C SO20 300”, DIP20, QFN20 Rev. 9 November 2007 1/173 1 Table of Contents ST7LITE3xF2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 REGISTER & MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3 PROGRAMMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 ICC INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.5 MEMORY PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.6 RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.7 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 DATA EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3 MEMORY ACCESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.4 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.5 ACCESS ERROR HANDLING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.6 DATA EEPROM READ-OUT PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.7 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20.


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