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TB62705CFN Dataheets PDF



Part Number TB62705CFN
Manufacturers Toshiba
Logo Toshiba
Description 8BIT SHIFT REGISTER / LATCHES & CONSTANT CURRENT DRIVERS
Datasheet TB62705CFN DatasheetTB62705CFN Datasheet (PDF)

TB62705CP/CF/CFN TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62705CP,TB62705CF,TB62705CFN 8-BIT SHIFT REGISTER, LATCHES & CONSTANT-CURRENT DRIVERS The TB62705CP / CF / CFN are specifically designed for LED and LED DISPLAY constant-current drivers. These constant-current output circuits can support the set-up of an external resistor (IOUT = 5~90mA). This IC is a monolithic integrated circuit designed to be used together with Bi-CMOS process. The devices consist of an 8-bit shift regi.

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TB62705CP/CF/CFN TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62705CP,TB62705CF,TB62705CFN 8-BIT SHIFT REGISTER, LATCHES & CONSTANT-CURRENT DRIVERS The TB62705CP / CF / CFN are specifically designed for LED and LED DISPLAY constant-current drivers. These constant-current output circuits can support the set-up of an external resistor (IOUT = 5~90mA). This IC is a monolithic integrated circuit designed to be used together with Bi-CMOS process. The devices consist of an 8-bit shift register, latch, AND-GATE and constant-current drivers. FEATURES z Constant-current Output : current with one resistor for 5 to 90mA. z Maximum Clock Frequency : fCLK = 15 (MHz) (Cascade Connecte Operate, Topr = 25°C) z 5V C−MOS Compatible Input z Package : DIP16−P−300−2.54A (TB62705CP) SSOP16−P−225−1.00A (TB62705CF) SSOP16−P−225−0.65B (TB62705CFN) z Constant Output Current Matching: OUTPUT-GND VOLTAGE ≥ 0.4 V ≥ 0.7 V CURRENT MATCHING ±6.0% ±6.0% OUTPUT CURRENT 5~40 mA 5~90 mA TB62705CP TB62705CF TB62705CFN PIN CONNECTION (Top view) GND SERIAL-IN CLOCK LATCH OUTn OUTn OUTn OUTn 1 2 3 4 5 6 7 8 16 VDD 15 R-EXT 14 SERIAL-OUT 13 ENABLE 12 OUTn 11 OUTn 10 OUTn 9 OUTn Weight DIP16-P-300-2.54A: 1.11 g (typ.) SSOP16-P-225-1.00A: 0.14 g (typ.) SSOP16-P-225-0.65B: 0.07 g (typ.) 1 2006-06-13 BLOCK DIAGRAM OUTn OUTn TB62705CP/CF/CFN OUTn TIMING DIAGRAM CLOCK SERIAL-IN LATCH ENABLE OUT0 OUT1 OUT3 OUT7 SERIAL-OUT 5V 0V 5V 0V 5V 0V 5V 0V Off On Off On Off On Off 5V 0V Note: Latches are level-sensitive, not rising edge-sensitive, and are not synchronized with the CLOCK signal. The data will pass through the latch circuit if the latch input is set at “H” level, and will be retained if the input is set at “L”. 2 2006-06-13 PIN DESCRIPTION TB62705CP/CF/CFN PIN No. 1 2 3 4 5~12 13 14 15 16 PIN NAME FUNCTION GND SERIAL−IN CLOCK LATCH OUTn ENABLE SERIAL−OUT R−EXT VDD GND terminal for control logic Input pin for shift register serial data Clock input terminal for data shift to up-edge. Data strobe input terminal. Latches pass LATCH data with “H” level input and retain data with “L” level input. Output terminals Input terminal for output enable. All outputs ( OUTn ) go off with ENABLE data input at "H" level and go on with data input at "L" level. Output terminal for serial data for the next SERIAL-IN terminal. Input terminal for connecting a resistor to regulate all output currents. 5-V supply pin of the IC TRUTH TABLE CLOCK LATCH ENABLE SERIAL−IN OUTn SERIAL−OUT UP UP UP DOWN DOWN H L H X X L Dn L Dn+1 L Dn+2 L Dn+3 H Dn+3 Dn ··· Dn−5 ··· Dn−7 No change Dn+2 ··· Dn−3 ··· Dn−5 Dn+2 ··· Dn−3 ··· Dn−5 Off Dn−7 Dn−6 Dn−5 Dn−5 Dn−5 Note: OUTn = on if Dn = H level, and OUTn = off if Dn = L level. An external resistor is connected with R−EXT and GND. Be sure to administer the correct power supply voltage. INPUT/OUTPUT EQUIVALENT CIRCUITS 1. ENABLE terminal 2. LATCH terminal 3. CLOCK, SERIAL−IN terminal 4. SERIAL−OUT terminal 3 2006-06-13 ABSOLUTE MAXIMUM RATINGS (Ta = 25°C) TB62705CP/CF/CFN CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage Input Voltage Output Current Output Voltage Clock Frequency GND Terminal Current Power Dissipation Thermal Resistance Operating Temperature Storage Temperature VDD VIN IOUT VCE fCK IGND PD Rth (j−a) Topr Tstg 0~7.0 −0.4~VDD + 0.4 90 −0.5~17.0 15 720 1.47 (CP−type : FREE AIR, Ta = 25°C) 0.78 (CF / CFN−type : ON PCB, Ta = 25°C) 85 (CP−type : FREE AIR, Ta = 25°C) 160 (CF / CFN−type : ON PCB, Ta = 25°C) −40~85 −55~150 V V mA V MHz mA W °C / W °C °C Note: CP type: For an ambient temperature above 25°C, the derating is 11.8 mW/°C. CF and CFN type: For an ambient temperature above 25°C, the derating is 6.3 mW/°C. RECOMMENDED OPERATING CONDITION (Ta = −40~85°C unless otherwise stated) CHARACTERISTIC Supply Voltage Output Voltage Output Current Input Voltage LATCH Pulse Width CLOCK Pulse Width ENABLE Pulse Width Set-up Time for DATA Hold Time for DATA Set-up Time for LATCH Hold Time for LATCH Clock Frequency Power Dissipation SYMBOL CONDITION VDD VOUT IO IOH IOL VIH ― ― OUTn , DC 1 circuit SERIAL−OUT SERIAL−OUT ― VIL tw LAT tw CLK tw EN tsetup (D) thold (D) tsetup (L) thold (L) fCK PD ― VDD = 4.5~5.5 V Cascade operation Ta = 85°C (CP−type FREE AIR) Ta = 85°C (CF / CFN−type ON PCB) MIN TYP. MAX UNIT 4.5 5.0 5.5 V ― ― 15.0 V 5 ― 88 ― ― 1.0 mA ― ― −1.0 0.7 VDD ― VDD +0.3 V −0.3 ― 0.3 VDD 100 ― ― ns 50 ― ― ns 4500 ― ― ns 60 ― ― ns 20 ― ― ns 100 ― ― ns 60 ― ― ns 10.0 ― ― MHz ― ― 0.82 W ― ― 0.40 4 2006-06-13 TB62705CP/CF/CFN ELECTRICAL CHARACTERISTICS (VDD = 5.0 V, Ta = 25°C unless otherwise stated) CHARACTERISTIC Input Voltage "H" Level "L" Level Output Leakage Current Output Voltage S−OUT Output Current 1 Current Skew SYMBOL VIH VIL IOH VOL VOH IOL1 IOL2 ∆IOL1 TEST CIR− CUIT ― CONDITION ― ―― ― VOH = 15.0 V ― IOL = 1.0 mA ― IOH = −1.0 mA ― VCE = 0.7 V REXT = 470 Ω ― VCE = 0.4 V (Include skew) ― IO = 40 mA, VCE.


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