STN4826

STN4826 Dual N Channel Enhancement Mode MOSFET 8.0A DESCRIPTION The STN4826 is the Dual N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application , notebook computer power management and other battery powered circuits where high-side switching . PIN CONFIGURATION SOP-8 FEATURE 60V/ 8.0A, RDS(ON) = 30mΩ (Typ.) @VGS = 10V 60V/6.0A, RDS(ON) = 40mΩ @VGS = 4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design MARKING Y: Year Code A: Porduce Code B: Process Code 1 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2007, Stanson Corp. STN4826 2013. V1 STN4826 Dual N Channel Enhancement Mode MOSFET 8.0A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature VGSS ID IDM IS PD TJ Storgae Temperature Range TSTG Thermal Resistance-Junction to Ambient RθJA Typical 60 ±20 8.0 6.0 20 2.0 2.0 1.3 -55/150 -55/150 75 Unit V V A A A W ℃ ℃ ℃/W 2 120 Bentley Square, Mountain View, Ca 94040 USA www...