T
R
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S E M I C O N D U C T O R, I N C .
Figure 1. Block Diagram
FBIN
11
GA1086
S1
10
CLK
9
S0
8
NC
7
NC
6
GND
5
S2
12
VDD 13 Q/2 14 GND 15 FBOUT 16 Q1
17
Control Logic
Phase Detector VCO
4 VDD 3 2
Q9 Q8
11-Output Clock Buffer
Features
Operates from 30 MHz to 67MHz Pin-to-pin output skew of 250 ps (max) Period-to-period...