ET1100

Hardware Data Sheet ET1100 Slave Controller Section I – Technology (Online at http://www.beckhoff.com) Section II – Register Description (Online at http://www.beckhoff.com) Section III – Hardware Description Pinout, Interface description, electrical and mechanical specification, ET1100 features and registers Version 1.9 Date: 2014-07-07 DOCUMENT ORGANIZATION DOCUMENT ORGANIZATION The Beckhoff EtherCAT Slave Controller (ESC) documentation covers the following Beckhoff ESCs:  ET1200  ET1100  EtherCAT IP Core for Altera® FPGAs  EtherCAT IP Core for Xilinx® FPGAs  ESC20 The documentation is organized in three sections. Section I and section II are common for all Beckhoff ESCs, Section III is specific for each ESC variant. The latest documentation is available at the Beckhoff homepage (http://www.beckhoff.com). Section I – Technology (All ESCs) Section I deals with the basic EtherCAT technology. Starting with the EtherCAT protocol itself, the frame processing inside EtherCAT slaves is described. The features and interfaces of the physical layer with its two alternatives Ethernet and EBUS are explained afterwards. Finally, the details of the functional units of an ESC like FMMU, SyncManager, Distributed Clocks, Slave Information Interface, Interrupts, Watchdogs, and so on, are described. Since Section I is common for all Beckhoff ESCs, it might describe features which are not available in a specific ESC. Refer to the feature details overview in Section III of a specific ...