Document
K24C02C / K24C04 / K24C08C / K24C16B
Spring 2011
K24C02C/K24C04/K24C08C/K24C16B
2K bits (256 X 8) / 4K bits (512 X 8) / 8K bits (1024 X 8) / 16K bits (2048 X 8)
Features
?Wide Voltage Operation
- VCC = 1.8V to 5.5V
?Operating Ambient Temperature: -40• C to +85• C ?Internally Organized:
- K24C02C, 256 X 8 (2K bits)
- K24C04, 512 X 8 (4K bits)
- K24C08C, 1024 X 8 (8K bits)
- K24C16B, 2048 X 8 (16K bits)
?Two-wire Serial Interface ?Schmitt Trigger, Filtered Inputs for Noise Suppression ?Bidirectional Data Transfer Protocol
?1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility ?Write Protect Pin for Hardware Data Protection ?8-byte Page (2K), 16-byte Page (4K, 8K, 16K) Write Modes ?Partial Page Writes Allowed ?Self-timed Write Cycle (5 ms max) ?High-reliability
- Endurance: 1 Million Write Cycles
- Data Retention: 100 Years
?8-lead PDIP/SOP/MSOP/TSSOP, 8-pad DFN, and SOT23-5
packages
General Description
The K24C02C/K24C04/K24C08C/K24C16B provides 2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The K24C02C/K24C04/K24C08C/K24C16B is available in space-saving 8-lead PDIP , 8-lead SOP, 8-lead MSOP, 8-lead TSSOP, 8-pad DFN, and SOT23-5 packages and is accessed via a two-wire serial interface.
Pin Configuration
?Table 1: Pin Configuration
Pin Name A0 - A2 SDA SCL WP GND VCC
Founctions Address Inputs
Serial Data Serial Clock Input
Write Protect Ground
Power Supply
8-pad DFN
SOT23-5
VCC
WP SCL SDA
8 7 6 5
1 A0 2 A1 3 A2 4 GND
Bottom view
SCL GND SDA
1 2 3
5 WP 4 VCC
8-lead PDIP
A0 A1 A2 GND
1 2 3 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead SOP
A0 A1 A2 GND
1 2 3 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead TSSOP
A0 A1 A2 GND
1 2 3 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead MSOP
A0 A1 A2 GND
1 2
3 4
8 VCC 7 WP 6 SCL 5 SDA
Spring 2011
V1.3 .001.
K24C02C/K24C04/K24C08C/K24C16B
2K bits (256 X 8) / 4K bits (512 X 8) / 8K bits (1024 X 8) / 16K bits (2048 X 8)
Block Diagram
VCC GND
WP SCL SDA
A0 A1 A2
START STOP LOGIC
LOAD
SERIAL CONTROL LOGIC
EN
COMP
DEVICE ADDRESS COMPARATOR
LOAD
INC
DATA WORD ADDRESS COUNTER
HIGH VOLTAGE PUMP/TIMING DATA RECOVERY
EEPROM
X DECODER
Y DECODER DIN
DOUT
SERIAL MUX DOUT/ACKNOWLEDGE
Spring 2011
V1.3 .002.
K24C02C/K24C04/K24C08C/K24C16B
2K bits (256 X 8) / 4K bits (512 X 8) / 8K bits (1024 X 8) / 16K bits (2048 X 8)
Pin Descriptions
DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the K24C02C. Eight 2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). The K24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect and can be connected to ground. Th.