Document
STF11N65M2, STFI11N65M2
N-channel 650 V, 0.6 Ω typ., 7 A MDmesh II Plus™ low Qg
2
Power MOSFETs in TO-220FP and I PAKFP packages
Datasheet - preliminary data
Features
3 2 1
TO-220FP
1 23
I2PAKFP
Figure 1. Internal schematic diagram
'
*
6
AM01476v1
Order codes STF11N65M2 STFI11N65M2
VDS 650 V
RDS(on) max ID
0.67 Ω
7A
• Extremely low gate charge • Lower RDS(on) x area vs previous generation • Low gate input resistance • 100% avalanche tested • Zener-protected
Applications
• Switching applications
Description
These devices are N-channel Power MOSFETs developed using a new generation of MDmesh™ technology: MDmesh II Plus™ low Qg. These revolutionary Power MOSFETs associate a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. They are therefore suitable for the most demanding high efficiency converters.
Order codes STF11N65M2 STFI11N65M2
Table 1. Device summary
Marking
Package
11N65M2
TO-220FP
2
I PAKFP
Packaging Tube
May 2014
DocID025806 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/14
www.st.com
Contents
Contents
STF11N65M2, STFI11N65M2
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STF11N65M2, STFI11N65M2
1 Electrical ratings
Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter
Value
VGS
(1)
ID
(1)
ID
(2)
IDM
(1)
PTOT
(3)
dv/dt
(4)
dv/dt
Gate-source voltage Drain current (continuous) at Tc = 25 °C Drain current (continuous) at Tc = 100 °C Drain current (pulsed) Total dissipation at TC = 25 °C Peak diode recovery voltage slope (starting Tj = 25 °C, ID= IAS, VDD = 50 V) MOSFET dv/dt ruggedness
VISO
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C)
Tstg Storage temperature
Tj Max. operating junction temperature
1. The value is rated according to Rthj-case and limited by package. 2. Pulse width limited by Tjmax 3. ISD ≤ 7 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD=80% V(BR)DSS. 4. VDS ≤ 520 V
± 25 7 4.4 28 25 15 50
2500
- 55 to 150 150
Symbol
Table 3. Thermal data Parameter
Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-amb max
Value 5
62.5
Symbol
Table 4. Avalanche characteristics
Parameter
Value
Avalanche current, repetitive or not IAR repetitive (pulse width limited by Tjmax)
Single pulse avalanche energy (starting EAS Tj=25°C, ID= IAR; VDD=50)
1.5 110
Unit V A A A W
V/ns V/ns
V
°C
Unit °C/W °C/W
Unit A mJ
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Electrical characteristics
2 Electrical characteristics
STF11N65M2, STFI11N65M2
(TC = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states Test conditions
Drain-source V(BR)DSS breakdown voltage
(VGS = 0)
ID = 1 mA
IDSS
Zero gate voltage
VDS = 650 V
drain current (VGS = 0) VDS = 650 V, TC=125 °C
IGSS
Gate-body leakage current (VDS = 0)
VGS = ± 25 V
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 μA
Static drain-source RDS(on) on-resistance
VGS = 10 V, ID = 3.5 A
Min. Typ. Max. Unit
650 V
1 μA 100 μA ±10 μA 2 3 4V 0.6 0.67 Ω
Symbol
Parameter
Table 6. Dynamic Test conditions
Min. Typ. Max. Unit
Ciss Coss
Crss
Input capacitance Output capacitance Reverse transfer capacitance
VDS = 100 V, f = 1 MHz, VGS = 0
- 410 - pF - 20 - pF - 0.95 - pF
(1) Equivalent output Coss eq. capacitance
VDS = 0 to 520 V, VGS = 0
- 83 - pF
Intrinsic gate RG resistance
f = 1 MHz open drain
- 6.4 - Ω
Qg Total gate charge
VDD = 520 V, ID = 7 A, Qgs Gate-source charge VGS = 10 V (see Figure 15)
Qgd Gate-drain charge
- 12.5 - nC - 3.2 - nC - 5.8 - nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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STF11N65M2, STFI11N65M2
Electrical characteristics
Symbol
Table 7. Switching times
Parameter
Test conditions
Min. Typ. Max. Unit
td(on) tr
td(off) tf
Turn-on delay time Rise time Turn-off delay time Fall time
- 9.5 - ns
VDD = 325 V, ID = 3.5 A,
- 7.5 - ns
RG = 4.7 Ω, VGS = 10 V (see
Figure 14 and 19)
- 26 - ns
- 15 - ns
Symbol
Table 8. Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
ISD Source-drain current
(1) (2)
ISDM
Source-drain current (pulsed)
(3)
VSD Forward on vol.