dsPIC33EV128GM106

dsPIC33EVXXXGM00X/10X FAMILY 16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features Operating Conditions 4.5V to 5.5V, -40°C to +85°C, DC to 70 MIPS 4.5V to 5.5V, -40°C to +125°C, DC to 60 MIPS 4.5V to 5.5V, -40°C to +150°C, DC to 40 MIPS Core: 16-Bit dsPIC33E CPU Code-Efficient (C and Assembly) Architecture 16-Bit Wide Data Path Two 40-Bit Wide Accumulators Single-Cycle (MAC/MPY) with Dual Data Fetch Single-Cycle, Mixed-Sign MUL plus Hardware Divide 32-Bit Multiply Support Intermediate Security for Memory: - Provides a Boot Flash Segment in addition to the existing General Flash Segment Error Code Correction (ECC) for Flash Added Two Alternate Register Sets for Fast Context Switching Clock Management Internal, 15% Low-Power RC (LPRC) – 32 kHz Internal, 1% Fast RC (FRC) – 7.37 MHz Internal, 10% Backup RC (BFRC) – 7.37 MHz Programmable PLLs and Oscillator Clock Sources Fail-Safe Clock Monitor (FSCM) Additional FSCM Source (BFRC), Intended to Provide a Clock Fail Switch Source for the System Clock Independent Watchdog Timer (WDT) System Windowed Watchdog Timer (DMT) Fast Wake-up and Start-up Power Management Low-Power Management modes (Sleep, Idle and Doze) Power Consumption Minimized Executing NOP String Integrated Power-on Reset (POR) and Brown-out Reset (BOR) 0.5 mA/MHz Dynamic Current (typical) 50 µA at +25°C IPD Current (typical) PWM Up to Six Pulse-Width Modulation (PWM) Outputs (t...