HCF4029B

HCC4029B HCF4029B PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE . . . . . . . . . . . MEDIUM SPEED OPERATION - 8MHz (typ.) @ CL = 50pF AND VDD-VSS = 10V MULTI-PACKAGE PARALLEL CLOCKING FOR SYNCHRONOUS HIGH SPEED OUTPUT RESPONSE OR RIPPLE CLOCKING FOR SLOW CLOCK INPUT RISE AND FALL TIMES ”PRESET ENABLE” AND INDIVIDUAL ”JAM” INPUTS PROVIDED BINARY OR DECADE UP/DOWN COUNTING BCD OUTPUTS IN DECADE MODE STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD No. 13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” EY (Plastic Package) F (Ceramic Package) M1 (Micro Package) C1 (Chip Carrier) ORDER CODES : HCC4029BF HCF4029BM1 HCF4029BEY HCF4029BC1 DESCRIPTION The HCC4029B (extended temperature range) and HCF4029B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4029B consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN (CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as outputs. A high PRESET ENABLE signal allows infor...